1280_Refresh_Buffer_Interface
1280 Refresh Buffer Interface Rationale A Kossow March 1985 The interface between the control,video memory, and ECL boards ( the refresh buffer ) and the CPU board was designed to permit external access of all physical device registers ( caps, rd/wr masks, etc.) and provides a dedicated drawing processor which executes frequently used graphics algorithms. Subdividing the task of manipulating the data in the refresh buffer was a trade off between complexity of drawing processor microcode and refresh buffer performance. The operations performed by the drawing processor are common graphics primitives ( move, draw, erase, bit-block transfer) or are the refresh buffer intensive sections of more complicated algorithms such as fills. The number of different types of drawing primitives has been kept small. Of the 64 possible entry points, only 25 have currently been defined. Primitive Number Function ---------------- -------- 0 Reset Drawing Processor/ Initialize Refresh Buffer 1 12 X 12 unsigned multiply 2 24 / 12 unsigned divide 10 Read/Write X Cap in current window space (move x) 11 Read/Write Y Cap in current window space (move y) 20 Read Window Boundaries 21 Write Window Boundaries 22 Erase Current Window 23 Update Color Table Entry (Waits for Start of H Blank) 24 Draw Vector Absolute 25 Draw Vector Relative 26 Draw Filled Rectangle Absolute 27 Draw Filled Rectangle Relative 28 Bit-Block Transfer Absolute 29 Bit-Block Transfer Relative 2A Draw Character 2B Write N Pixels Along Major Axis 2C Edge Flag Search 2D Edge Flag Fill 2E Interior Fill Search 2F Interior Fill Fill 30 Overlay Fill Search 31 Overlay Fill Fill 32 General Fill Search 33 General Fill Fill Refresh Buffer Register Summary ------------------------------- Read Mask '1' Bits enable bit plane data to LUT rams Write Mask '1' Bits enable writing bit planes Overlay Color Color of bits set in the overlay plane Lut Adr Address of color look up table entry Lut Red Value of Red LUT entry at 'Lut Adr' Lut Grn Value of Grn LUT entry at 'Lut Adr' Lut Blu Value of Blu LUT entry at 'Lut Adr' Control Reg Controls which axis is the major axis (X or Y), the direction of adv in major and minor, enabling display or writing of the overlay plane, and 960/1024 vertical display format Stipple Reg An 8 bit recirculating shift register which can inhibit video memory writes. Useful for repeating pattern fills, or patterned line draws X Cap Current X position within refresh buffer memory Y Cap Current Y position within refresh buffer memory VidNoi Video memory data, does not advance X,Y Caps VidMaj Video memory data, advances major axis VidMin Video memory data, advances minor axis VidBoth Video memory data, advances major and minor axis StpNoi Same as Vid???, except the writing of video memory StpMaj is inhibited if the most significant bit of the StpMin stipple register is a 0 StpBoth MWENoi Same as Vid???, except a 10 horizontal pixels will MWEMaj be written at once. MWEMin MWEBoth Display Processor Register Summary ---------------------------------- Parameter Register 0-15 Argument/Result Storage for DPU Primitives X Pos Current X position in window Y Pos Current Y position in window FG Color Current drawing color BG Color Current erase color Chr X Width of a character Chr Y Height of a character Chr dX Horizontal Inter-character spacing Chr dY Vertical Inter-character spacing XWBot Lower Left Corner of Current Window YWBot XWTop Upper Right Corner of Current Window YWTop