Decmate_II_Specification_Jan83
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
REV. DATE MAJOR CHANGES # OF PAGES
------------------------------------------------------------
| | | | |
| 0 |16-Nov-81 | Originate | |
| | | | |
------------------------------------------------------------
| | | | |
| 1 |17-Nov-81 |Added CPU instruction list | |
| | | | |
------------------------------------------------------------
| | |Changed instruction timings to| |
| 2 |30-Dec-81 |reflect 8/4 MHz. operation. | |
| | |Added Z80 softcard to options.| 33 |
| | |Added Index, changed name. | |
| | | | |
------------------------------------------------------------
| | | | |
| 3 |10-Apr-82 |Added details of communication| |
| | |and user writeable characters | |
| | |Re-arranged sections. | |
| | | | |
------------------------------------------------------------
| | | | |
| |08-Aug-82 |Added environmental specns., | |
| | |dimensions and electrical | |
| | |requirements. Added example of| |
| | |programming the communications| 59 |
| | |port. Added to list of ESCape | |
| | |sequences supported. | |
| | | | |
------------------------------------------------------------
| | | | |
| 4 |18-Jan-83 |Added ROM useage data, disk | |
| | |useage for TRK 0 and 78, 79 | 71 |
| | |Updated ESCape sequence list | |
| | | | |
------------------------------------------------------------
| | | | |
| | | | |
| | | | |
| | | | |
------------------------------------------------------------
JOHN KIRK
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
INDEX.
Section Contents Page
1. Physical 2
1.1 Mechanical 2
1.2 Electrical 2
1.3 Environmental 2
2. System Components
2.1 CPU 3
2.2 Memory 3
2.3 Disk 4
2.4 Display 4
2.5 Keyboard 5
2.6 Printer Controller 5
2.7 Clock 5
2.8 Communications Port 6
3. Options
3.1 Graphics 6
3.2 5.25" Winchester Disk Sub-system 6
3.3 Z80 Softcard 6
3.4 RX01/02 Adaptor 6
4. Detailed Description - Basic Machine
4.1 CPU 7
4.2 Display 7
4.2.1 Screen Format and Modes 8
4.2.2 Character Attributes 8
4.2.3 Character Types 9
4.2.4 Scrolling 10
4.2.4.1 Types of Scrolling 10
4.2.4.2 Scrolling Regions 10
4.2.5 Display Control - ANSI Mode 10
4.2.5.1 CPR 10
4.2.5.2 CUU 10
4.2.5.3 CUD 11
4.2.5.4 CUF 11
4.2.5.5 CUB 11
4.2.5.6 CUP 12
4.2.5.7 HVP 12
4.2.5.8 DSR 12
4.2.5.9 IND 12
4.2.5.10 NEL 12
4.2.5.11 RI 12
4.2.5.12 DA 13
4.2.5.13 ED 13
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
4.2.5.14 EL 14
4.2.5.15 DECKPNM 14
4.2.5.16 DECPAM 14
4.2.5.17 SM 15
4.2.5.18 RM 15
4.2.5.19 ANSI Specified SM/RM Parameters 15
4.2.5.20 DEC Private SM/RM Parameters 16
4.2.5.21 SCS 17
4.2.5.22 SGR 20
4.2.5.23 DECDWL 20
4.2.5.24 DECDHL 21
4.2.5.25 DECSWL 21
4.2.5.26 DECSTBM 21
4.2.5.27 HTS 22
4.2.5.28 TBC 22
4.2.5.29 DECSC 22
4.2.5.30 DECRC 22
4.2.5.31 DECPRS 22
4.2.5.32 DECLL 22
4.2.5.33 DECALN 22
4.2.5.34 IL 23
4.2.5.35 DL 23
4.2.5.36 DCH 23
4.2.6 Display Control - VT52 Mode
4.2.6.1 Cursor Up 23
4.2.6.2 Cursor Down 24
4.2.6.3 Cursor Right 24
4.2.6.4 Cursor Left 24
4.2.6.5 Enter Graphics Mode 24
4.2.6.6 Exit Graphics Mode 24
4.2.6.7 Cursor Home 24
4.2.6.8 Reverse Linefeed 24
4.2.6.9 Erase to End of Screen 24
4.2.6.10 Erase to End of Line 24
4.2.6.11 Direct Cursor Address 25
4.2.6.12 Identify 25
4.2.6.13 Enter Alternate Keypad Mode 25
4.2.6.14 Exit Alternate Keypad Mode 25
4.2.6.15 Enter ANSI Mode 25
4.3 Keyboard 25
4.3.1 Instruction List 26
4.4 RX50 Disk Controller 26
4.5 Printer Port 29
4.6 Communications Port 30
4.6.1 Instruction List 30
4.6.2 Internal Registers 32
4.6.2.1 Control Register - R0 32
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
4.6.2.2 Control Register - R1 33
4.6.2.3 Control Register - R2 33
4.6.2.4 Control Register - R3 33
4.6.2.5 Control Register - R4 34
4.6.2.6 Control Register - R5 34
4.6.2.7 Control Register - R6 35
4.6.2.8 Control Register - R7 35
4.6.2.9 Status Register 0 36
4.6.2.10 Status Register 1 36
4.6.3 Data Transfer
4.6.3.1 Input 37
4.6.3.2 Output 37
4.7 Clock 37
5. Detailed Description - Options
5.1 Identification 38
5.1.1 Z80 APU 38
5.2 Graphics 39
5.3 Micro Winchester Disk Adaptor 39
5.4 RX01/02 Adaptor 39
6. Firmware Details 39
6.1 CRT Controller and Associated Logic 40
6.1.1 80/132 Column Mode 41
6.1.2 Video Enable 41
6.1.3 Screen Mode 41
6.1.4 Cursor Mode 41
6.1.5 Erase Control 41
6.6.6 Extended Character Mode 42
6.1.7 User Character Set Mode 42
6.1.8 CRT Controller Registers 44
6.1.9 Cursor Visibility 46
6.2 Panel Requests 47
6.2.1 PR0 47
6.2.2 PRO 47
6.2.3 PR2 47
6.2.4 PR3 47
6.3 Terminal Input Output 50
Appendix A. Standard ROM Character Definitions 51
Appendix B. CPU Instruction Set 52
Appendix C. Example of Communications-Port Use 56
Appendix D. Memory Allocation 62
Appendix E. ROM Contents 63
Appendix F. Disk Format Track 0, Tracks 78 and 79 68
Appendix G. Boot Block Standard 71
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
General
This document describes a single board computer system having a
single RX50 drive as the basic mass storage device. A second RX50
is optional.
Together with the LK201 keyboard and the VR201 monitor, this
forms a lower cost replacement for the existing DECmate I system.
Features of this new system are compared and contrasted to those
of DECmate I.
Options include Z80 auxiliary processing unit, bitmap graphics
card and interfaces to RX02(RX01) disk drives and to a 5.25"
Winchester disk.
One stated goal is that existing software, now running on the
DECmate I, will run unaltered with the exceptions relating to
disk capacity differences and the programming notes given in
Sections 4.6 and 4.7. The new machine has additional features
over and above those of DECmate I which may be used as software
is developed, these will not, however, cause improper operation
for those programs unaware of the new features.
This specification describes what the combination of hardware and
firmware currently do (Firmware Revision 0224). Future
enhancements to the firmware may add to what is described here.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 1 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
1. Physical
The single board computer system module, the RX50 floppy disk
drive(s) (RD50/51 Disk Drive) and a power supply to supply the
module, disk(s), monitor and keyboard are housed in a small box
that connects to the AC power line and to the monitor. The
keyboard connects to the monitor. Provision is made for the
addition of one or more daughter boards to allow optional bitmap
graphics, Z80 APU, RX01/02 adaptor and an interface to a 5.25"
Winchester disk drive.
1.1 Mechanical
1.1.1 System Box
Dimensions 6.5" (H) x 14.3" (D) x 19" (W)
Weight (single RX50) 30 lbs.
(Dual RX50) 32 lbs.
1.1.2 Monitor
Dimensions 11.5" x13.75" x12.25"
Weight 14 lbs.
1.1.3 Keyboard
Dimensions 2" x6.75" x21"
Weight 4.5 lbs.
1.2 Electrical
Input voltage 95 - 128 VAC 1 phase or
190 - 256 VAC 1 phase
Frequency 47 - 63 Hz.
Power Consumption 218 watts (max.)
3A @ 120 VAC.
1.5A @ 240 VAC.
The AC input voltage selection is made by a switch at the rear of
the system box. A detachable linecord allows the system to be
configured easily for operation in most countries of the world.
1.3 Environmental
Operating :
temperature range 59 - 90 F
humidity 20 - 80 % non condensing with a
maximum wet bulb of 77 F and a
minimum dewpoint of 6 F.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 2 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
(Recommended operating range 65 - 75 F, 40 - 60% RH)
Altitude 0 - 10,000 feet.
2.0 System Components
The basic DECmate II configuration is as follows :
. CPU - 6120 High Speed CMOS Processor
. 32K words of user memory
. 32K words of control memory used for
Internal diagnostics
Floppy disk bootstrap
Character display level 1 terminal emulation
Display buffer memory
Space available to user for fast overlays etc.
. Dual/quad 5.25" floppy disk controller
. Video display controller
. Keyboard controller
. Serial printer controller
. 100 Hz. crystal controlled clock
. Multi-protocol communications line controller
2.1 CPU
DECmate II DECmate I
CPU chip 6120 6120
Speed 8/4 MHz. 5 MHz.
Interrupt Latency < 250 usec. < 1 msec.
DMA overhead ~10% 2.5%
2.2 Memory
DECmate II DECmate I
User memory 32K words 32K words
Control memory 32K words 4K words
Startup & self-test 4K words Included in control
memory number.
The startup ROM is loaded into control memory RAM at power on.
This code performs self-test, initialization of the I/O
controllers and CRT controller. When this is successfully
completed the disk bootstrap code is executed. The main part of
control panel memory which defines the terminal characteristics
is then loaded from the disk. Additional or replacement control
memory code may be loaded from the disk as required to extend the
function of the machine, e.g. support for multiple display pages,
high speed overlays etc.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 3 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
2.3 Disk
The DECmate II has as standard a single RX50 disk drive with a
second drive optional. Capacity differences from DECmate I are
given below. All numbers are in decimal.
2.3.1 DECmate II DECmate I
RX50 drive(s) RX02
Basic
# of drives 1 - 5.25" 2 - 8"
# of surfaces 2 2
Capacity/drive 408K 12-bit words 256K 12-bit words
816K bytes 512K bytes
Basic capacity 408K 12-bit words 512K 12-bit words
816K bytes 1.024M bytes
Expansion Second drive within Second RX02, requires
same system box. additional box
Total capacity 816K 12-bit words 1.024M 12-bit words
1.632M bytes 2.048M bytes
2.3.2 Format
# tracks 80 77
# sectors/track 10 26
Bytes/sector 512 256
Words/sector 256 128
Recording MFM MFM with FM headers
All the current operating systems use 12-bit mode for disk
storage, thus capacity numbers are given for both this mode and
for 8-bit mode (byte).
2.4 Display
DECmate II DECmate I
CRT 12" diagonal, P4 phosphor
Format, normal 24 x 80 24 x 80
Format, wide 24 x 132 14 x 132
Character 7 x 9 matrix 7 x 9 matrix
(within a 10 x 10 character cell)
Character set DEC Multi-national 94 ASCII subset plus
set plus Katakana special graphics
and DECmate I foreign.
128 user defined 128 fixed (ROM) option
for foreign language.
Character Bold Bold
attributes Blink Blink
Underline Underline
Reverse Reverse
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 4 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Character type Normal Normal
Double Height -
Double Width -
Screen Normal Normal
attributes Reverse -
Scrolling Jump or variable rate* Jump only
smooth scrolling.
Scroll region Selectable scroll Full page scroll region.
only
Windows Multiple display pages Single page only
horizontal scroll.**
Performance Full screen update Full screen update
< 0.1 seconds. < 2 seconds.
* Current firmware implements fixed rate smooth scroll only.
** Current firmware implements single page only with no
horizontal scrolling.
The CRT controller uses a buffer area in control memory,
accessing data by DMA using a single row buffer. Sequential list
screen addressing is used, allowing all the features of the VT100
to be implemented. In addition, multiple display pages may be
used in some future revison of the firmware, giving fast page
swaps or horizontal scrolling for those applications programs
that can take advantage of these features. (not currently
implemented).
2.5 Keyboard
This is a version of the LK201 keyboard with keycaps appropriate
for the Word Processing Software. Initially only a subset of the
keyboard capabilities will be supported, enough to perform the
functions of the VT100/DECmate I keyboard. The interface to
DECMate II is by a full duplex, serial asynchronous line
operating at 4800 baud.
2.6 Printer controller
A full duplex serial asynchronous line with EIA signalling levels
and programmable speed, DECmate I compatible.
2.7 Clock
A 100 Hz. clock, crystal controlled as on DECmate I, the
instruction set is, however, different - see Section 4.7
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 5 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
2.8 Communications
DECmate II DECmate I
Standard Single line, async/ None
sync., byte and bit
protocols
Optional None Two lines, async/sync.
byte and bit protocols
I/O levels EIA only EIA only
The communications line that is standard on the DECmate II
supports both bit and byte oriented synchronous communications
protocols in addition to asynchronous operation.
3.0 Options
3.1 Graphics
An optional daughter board provides bitmap graphics capabilities.
Refer to the appropriate option description for full details:
Resolution 768 (H) x 240 (V)
# of planes 3 with a fourth optional
Grey scale 8 levels
Colour R-G-B outputs to external colour monitor via
colour map, 16 colours (with optional fourth
plane).
Performance Medium, programmed I/O device
3.2 Micro Winchester Disk System
A second option board allows connection of a 5.25" Winchester
disk drive, capacity either 5 or 10 MBytes. This drive is housed
in the system box, occupying the space normally reserved for the
second RX50 floppy disk drive.
3.3 Z80 Auxiliary Processing Unit (APU)
A third option module allows a Z80 processor and memory system to
be added to the DECmate II. Control code, executed by the 6120
processor, allows the Z80 to be selected as the active processor
with the 6120 performing all the I/O operations for it.
3.4 RX01/02 Adaptor
Another option allows one or two RX01 or RX02 8" floppy disk
drives to be attached to DECmate II. This allows for simple file
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 6 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
interchange between existing 8" diskettes and 5.25" diskettes.
This option card and the Micro Winchester Option are mutually
exclusive.
4.0 Detailed Description
4.1 CPU
The 6120 is a high speed, CMOS processor that executes, as a
subset, the instruction set of the PDP 8/A. Additional
instructions implement stack operations and provide a mechanism
for using the dual address space feature of the processor. Each
address space has its own interrupt mechanism, allowing the
single CPU to be used to execute a user program and, in a
completely transparent mode, to emulate certain peripheral
devices - the keyboard and display portions of the machine - to
allow program compatibility with older PDP 8 machines where the
terminal was a separate device connected via a serial line.
The emulation process is similar to that used with the DECmate I
and although the hardware is significantly different, software
compatibility is maintained.
4.2 Display
The DECmate I used a display buffer that could be switched to be
a part of the CPU control memory address space when an update was
required. When the CRT controller was accessing the display
buffer it was no longer a part of the CPU memory and there was
therefore no contention between the CRT controller and the CPU,
nor any CPU bus overhead. In this way all the bandwidth of the
display buffer memory was available during the active portion of
the display. The limitation of this scheme is that the display
buffer is only available to the CPU for about 1.5 msec. per frame
(16.67 msec.). This meant that display buffer updates had to be
performed as a burst operation, during this 1.5 msec. In
addition, as this was a control memory operation, user interrupts
were locked out for the total duration of the update interval. It
was thus necessary to limit the update time to less-than l-msec.
to avoid losing data coming in on the communications line, or
limit the communications line speed to something less than 9600
baud. The result of these constraints was that the screen could
not be changed faster than an effective rate of 9K baud.
(effective rate compares the change to that of a conventional
terminal connected over a serial asynchronous line)
The DECmate II uses a portion of the control memory as the
display buffer memory together with a single row buffer which is
filled from control memory by DMA. The DMA filling process is a
burst operation and locks out the CPU for one line time, 64usec.,
every 640 usec. This is an overhead of about 10%, but distributed
over the entire frame rather than lumped as is the 1 msec. with
DECmate I. As the display buffer is available to the CPU at all
times other than during the DMA cycles, the screen data may be
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 7 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
changed very quickly.
More memory space is available for the display buffer than was
possible with DECmate I, giving the ability to maintain multiple
display pages and switch between them very quickly or to use this
additional space to implement horizontal scrolling. The space
allocated for the display buffer allows for up to three display
pages in 80 column mode and, subject to certain constraints, two
pages in 132 column mode. An added advantage of the display
buffer structure adopted is that the screen contents may be
preserved when changing from 80 column to 132 column mode and
vice versa.
4.2.1 Screen Format and Modes
The display has 24 rows of characters, selectable for 80 or 132
characters per row on a screen basis.
Characters may be displayed as white on a black background
(Normal Mode) or black on a white background (Reverse Mode).
4.2.2 Character Attributes
For both formats and modes the following attributes, selectable
on a character basis are allowed :
Normal Screen Mode
BLINK - the selected character is displayed alternating
between two intensities, normal (as modified by attribute
BOLD) and lower than normal.
BOLD - the selected character is displayed at a higher
than normal intensity.
UNDERLINE - the selected character has a continuous line
added below the lowest character element for an upper
case character or through the first element of the
descender for characters with descenders.
REVERSE - the selected character is displayed as a
reverse image, i.e. the cell background is white, the
character information is black. This attribute modifies
the action of attributes BLINK and BOLD such that they
operate on the cell background rather than on the
character data, e.g. REVERSE and BOLD results in a cell
background that is brighter than normal, the character
itself remains black.
Reverse Screen Mode
BLINK - the cell background of the selected character is
displayed alternating between two intensities, normal (as
modified by attribute BOLD) and lower than normal.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 8 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
BOLD - the cell background of the selected character is
displayed at a higher than normal intensity.
UNDERLINE - the selected character has a continuous
(black) line added below the lowest character element for
an upper case character or through the first element of
the descender for characters with descenders.
REVERSE - the selected character is displayed as a
reverse image, i.e. the cell background is black, the
character information is white. This attribute modifies
the action of attributes BLINK and BOLD in Reverse SCreen
Mode such that they operate on the character data rather
than on the cell background e.g. REVERSE and BOLD results
in a character that is white and brighter than normal,
the cell background being black.
4.2.3 Character Types
Character type may be selected on a row basis to be :
Normal - the character row is 80 or 132 characters each
defined within a 10 dot x 10 dot cell as shown in Fig. 1
Double Width - the character row is 40 or 66 characters
each defined within a double width cell.
Double Height - the character row is 40 or 66 characters
each defined within a double height and double width
cell, thus a double height character row occupies two
normal row positions.
Dot Position
(9)0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0
L 0 . . . . . . . . . . . . . . . . . . . . . .
i 1 . * * * * * * * . . . * * * * * * * . . . *
n 2 . * * * * * * * . . . * * * * * * * . . . *
e 3 . * * * * * * * . . . * * * * * * * . . . *
4 . * * * * * * * . . . * * * * * * * . . . *
N 5 . * * * * * * * . . . * * * * * * * . . . *
u 6 . * * * * * * * . . . * * * * * * * . . . *
m 7 . * * * * * * * . . . * * * * * * * . . . *
b 8 # = = = = = = = # # # = = = = = = = # # # =
e 9 . + + + + + + + . . . + + + + + + + . . . +
r 0 | | | |
| |<---Character----->|
| | Cell | |
|<-----Attribute--->|
| Cell |
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 9 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
* Upper case, lower case or Special Graphics
= Lower case, Underline or Special Graphics
+ Lower case or Special Graphics
. Special Graphics
FIGURE 1 - Character Cell Dot Placement
4.2.4 Scrolling
4.2.4.1 Types
Scrolling may be set to be Jump or Smooth. In Jump scroll the
display advances by a complete character row at a time, in Smooth
scroll it advances by one or more lines of a row at a time, with
the default of two lines at a time. (every 16 msec.)
4.2.4.2 Regions
The normal mode of operation of the display is for the entire 24
rows to be considered as a scrolling region. The display control
also allows the scroll region to be set to be only a part of the
screen, e.g. rows 5 to 12 may be set to scroll with rows 1 to 4
and 13 to 24 remaining fixed.
4.2.5 Display Control
To control the features of the display portion of the machine,
the following ESCAPE sequences are defined as the user interface.
The convention in the descriptions that follow is that the ESCAPE
sequence, when issued by the user, causes the effect indicated.
ESCAPE sequences generated by the display emulation code in
response to an ESCAPE sequence received from the user are
explicity noted.
4.2.5.1 CPR - Cursor Position Report
ESC [ Pv ; Ph R 033 133 ** 073 *** 122
Generated by the display emulation
firmware as a reply to the user generated
sequence "DSR" asking for a position
report.
Pv the current cursor vertical position,
expressed as a decimal string.
Ph the current cursor horizontal position,
expressed as a decimal string.
A response with no parameters, or parameters of 0;0, indicates
that the cursor is at the HOME position.
4.2.5.2 CUU - Cursor Up
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 10 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
ESC [ Pn A 033 133 ** 101
Moves the cursor up by the number of rows
specified by the parameter Pn, given as a
decimal string. No parameter or a
parameter of 0 or 1 indicate a single row
move. If an attempt is made to move
cursor above the top margin, the cursor
is positioned at the top margin. The
cursor horizontal position does not
change.
4.2.5.3 CUD - Cursor Down
ESC [ Pn B 033 133 ** 102
Moves the cursor down by the number of
rows specified by the parameter Pn, given
as a decimal string. No parameter or a
parameter of 0 or 1 indicates a single
row move. If an attempt is made to move
the cursor below the bottom margin, the
cursor is positioned at the bottom
margin. The cursor horizontal does not
change.
4.2.5.4 CUF - Cursor Forward
ESC [ Pn C 033 133 ** 103
Moves the cursor right by the number of
columns specified by the parameter Pn,
given as a decimal string. No parameter
or a parameter of 0 or 1 indicates a
single column move. If an attempt is made
to move the cursor beyond the right
margin, the cursor is positioned at the
right margin. The cursor vertical
position does not change.
4.2.5.5 CUB - Cursor Backwards
ESC [ Pn D 033 133 ** 104
Moves the cursor left by the number of
columns specified by the parameter Pn,
given as a decimal string. No parameter
or a parameter of 0 or 1 indicates a
single column move. If an attempt is made
to move the cursor beyond the left
margin, the cursor is positioned at the
left margin. The cursor vertical position
does not change.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 11 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
4.2.5.6 CUP - Cursor Position
ESC [ Pv ; Ph H 033 133 ** 073 *** 110
Moves the cursor to the position
specified by the parameters Pv and Ph.
Out of range parameters cause the cursor
to be positioned at the respective screen
extremity. See "Origin Mode", 4.2.5.20
Pv - cursor vertical position, expressed
as a decimal string.
Ph - cursor horizontal position,
expressed as a decimal string.
4.2.5.7 HVP - Horizontal and Vertical Position
ESC [ Pv ; Ph f 033 133 ** 073 *** 146
Same effect as CUP - see 4.2.5.6
4.2.5.8 DSR - Device Status Report
ESC [ 6 n 033 133 66 156
A request to the display emulation
firmware to report back the current
cursor position using a CPR sequence, see
Section 4.2.5.1
4.2.5.9 IND - Index
ESC D 033 104
Moves the cursor position down one row,
scrolling if necessary. The cursor
horizontal position is unchanged.
4.2.5.10 NEL - New Line
ESC E 033 105
Moves the cursor to the first column of
the next row down, scrolling if
necessary.
4.2.5.11 RI - Reverse Index
ESC M 033 115
Moves the cursor up one row, reverse
scrolling if necessary. The cursor
horizontal position is unchanged.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 12 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
4.2.5.12 DA - Device Attributes
ESC [ Pn c 033 133 * 143
Pn - 0 or not present is used as a
sequence generated by the user program to
request that the display emulation
firmware report back the device
characteristics, using a DA sequence as
defined below.
ESC [ ? 61;1 c 033 133 077 066 061 073 061 143
Defines the DECmate II as a Level 1
Terminal with 132 column extension.
Having been identified as such, the user
program may request more information by
use of the Secondary Device Attribute
Request.
ESC [ > Pn c 033 133 076 * 143
Pn - 0 or not present is a request from
the user program for transmission back of
the Secondary Device Attribute Response.
The resposnse for a DECmate II operating
with its own internal terminal Firmware
is:
ESC [ > 3 c 033 133 076 63 143
4.2.5.13 ED - Erase in Display
ESC [ Pn J 033 133 * 112
Pn - a parameter defining the erase
function.
Pn Erase Function
0 (060) or none Erase from the current cursor position to
the end of the screen, inclusive.
1 (061) Erase from the start of the screen to the
current cursor position, inclusive.
2 (062) Erase the entire screen.
In all cases the cursor position is unchanged when the ED
function has been completed.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 13 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
4.2.5.14 EL - Erase in Line
ESC [ Pn K 033 133 * 113
Pn - a parameter defining the erase
function.
Pn Erase Function
0 (060) or none Erase from the current cursor position to
the end of the current row, inclusive.
1 (061) Erase from the start of the current row
to the cursor, inclusive.
2 (062) Erase the entire current row.
"Current row" refers to that row on which the cursor is displayed
when the EL command is given. In all cases the cursor position is
unchanged when the EL function has been completed.
4.2.5.15 DECKPNM - Keypad Numeric Mode
ESC > 033 076
In this mode of operation, the keypad
keys transmit codes that correspond to
the symbols shown on the keys, with the
exception of PF1-4. The cursor keys
transmit ANSI cursor movement ESCAPE
sequences - see 4.2.5.20
4.2.5.16 DECPAM - Keypad Application Mode
ESC = 033 075
In this mode the codes transmitted by the
keypad keys change to the sequences shown
below.
Key Keypad Numeric Keypad Application
Mode Mode
0 0 (060) ESC O p (033 117 160)
1 1 (061) ESC O q (033 117 161)
2 2 (062) ESC O r (033 117 162)
3 3 (063) ESC O s (033 117 163)
4 4 (064) ESC O t (033 117 164)
5 5 (065) ESC O u (033 117 165)
6 6 (066) ESC O v (033 117 166)
7 7 (067) ESC O w (033 117 167)
8 8 (070) ESC O x (033 117 170)
9 9 (071) ESC O y (033 117 171)
- - (055) ESC O m (033-117 155)
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 14 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
, , (054) ESC O 1 (033 117 154)
ENTER RET (015) ESC O M (033 117 115)
PF1 ESC O P (033 117 120) ESC O P (033 117 120)
PF2 ESC O Q (033 117 121) ESC O Q (033 117 121)
PF3 ESC O R (033 117 122) ESC O R (033 117 122)
PF4 ESC O S (033 117 123) ESC O S (033 117 123)
4.2.5.17 SM - Set Mode
ESC [ PS ; Ps ; ..... h 033 133 * 073 * ..... 154
Set one or more operating parameters, specified by the parameter
string Ps...., as defined in Section 4.2.5.19. DEC Private
parameters are specified by adding the character "?" immediately
after the CSI introducer (ESC [).
i.e. the SM sequence for a DEC Private parameter is :
ESC [ ? ;Ps ; Ps ; ...... l
4.2.5.18 RM - Reset Mode
ESC [ Pr ; Pr ; ...... l 033 133 * 073 * 073 ... 150
Reset one or more operating parameters, specified by the
parameter string Pr...., as defined in Section 4.2.5.19. DEC
Private parameters are specified by adding the character "?"
immediately after the CSI introducer (ESC [).
i.e. the RM sequence for a DEC private parameter is :
ESC [ ? Pr ; Pr ; ..... l
4.2.5.19 ANSI Specified Parameters Applicable to SM and RM
Parameter Function Mnemonic
2 (062) SET - turns OFF the keyboard KAM
RESET - enables the keyboard
4 (064) SET-- selects insertion mode IRM
RESET - selects replacment mode
12 (061 062) SET - turns OFF local echo SRM
RESET - turns ON local echo
20 (062 060) SET - enables Newline mode LNM
RESET - disable Newline mode
IRM When Insertion Mode is set to Insert (SM),
characters sent to the screen for display are
inserted at the current cursor position and
characters to the right of the cursor position
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 15 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
are pushed towards the right hand end of the
current row. As characters moved right in this
fashion move beyond the right margin, they are
lost. When Insertion Mode is set to Replace, a
character sent to the screen for display replaces
any character at the current cursor position.
SRM When local echo is turned ON, characters typed on
the keyboard are displayed on the screen and
transmitted to the application program. When this
mode is turned OFF (normal), the application
program is responsible for echoing characters.
LNM When this mode is enabled (SET), pressing the
RETURN key causes both CR (015) and a LF (012)
codes to be passed to the application program.
When this mode is disabled (RESET), pressing the
RETURN key causes a CR code only to be
transmitted.
4.2.5.20 DEC Private Parameters Applicable to SM and RM
Parameter Function Mnemonic
1 (061) SET - enables Cursor Key Mode DECCKM
RESET - disables " " "
2 (062) SET - enables ANSI mode DECANM
RESET - enables VT52 mode
3 (063) SET - enables 132 column mode DECCOLM
RESET - enables 80 column mode
4 (064) SET - enables smooth scroll DECSCLM
RESET - enables jump scroll
5 (065) SET - gives white background DECSCNM
RESET - gives black background
6 (066) SET - enables Origin Mode DECOM
RESET - disables Origin Mode
7 (067) SET - enables auto-wrap DECAWM
RESET - disables auto-wrap
8 (070) SET - keyboard keys auto-repeat DECARM
RESET - no auto-repeat
25 (062 065) SET - the cursor is visible DECCUR
RESET - the cursor is invisible
Cursor key mode - the four cursor keys may be selected to
transmit either ANSI cursor key movement ESCAPE
sequences or Application ESCAPE sequences by this
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 16 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
SM/RM parameter if Keypad Application Mode is SET
- see 4.2.5.16. If Keypad Application Mode is
SET, the alternative code sequences that the
cursor keys can transmit are as follows :
Cursor Key Cursor Key Mode Cursor Key Mode
RESET SET
UP arrow ESC [ A (033 133 101) ESC O A (033 117 101)
DOWN arrow ESC [ B (033 133 102) ESC O B (033 117 102)
RIGHT arrow ESC [ C (033 133 103) ESC O C (033 117 103)
LEFT arrow ESC [ D (022 133 104) ESC O D (033 117 104)
ANSI/VT52 Mode -If ANSI Mode is SET, the display interface
responds to the ANSI set of ESCAPE sequences
defined in Section 6.6
If ANSI Mode is RESET, i.e. VT52 Mode, the
display interface responds to the VT52 set of
ESCAPE sequences defined in Section 7.
Origin Mode - If this mode is RESET, the screen origin is
always located at the upper left corner of the
screen and cursor addressing is absolute wrt to
screen physical location. If Origin Mode is SET,
the screen origin is relative to the start of the
current scrolling region and the cursor cannot be
positioned outside of the scrolling region. When
the Mode is changed, the cursor is repositioned
at the new origin.
Autowrap - If this Mode is RESET, characters sent to the
display when the cursor is positioned at the
rightmost column of a row overwrite previous
data, if any, at that location. If this Mode is
SET, sending new characters at this point will
cause an automatic NEWLINE to occur.
4.2.5.21 SCS - Select Character Set
The DECmate II is able to display characters and character
graphics from data stored in a character generator ROM or in RAM.
The ROM provides the bit patterns for the standard USASCII, UK,
DEC Multinational, Special Graphics and Katakana character sets.
The RAM may be loaded by the user to provide a wide variety of
other Foreign Language characters or extensions to the normal
display capabilities, e.g. scientific symbols.
DECmate II can support both 7-bit and 8-bit codes for display. In
its normal mode of operation, codes received for display are
assumed to be 7-bit and are masked to 7-bit prior to any display
translation occurring. If DEC 8-bit mode is selected, the full
8-bits of an input code have significance *.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 17 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
In interpreting input codes for display, there are two code
groups defined:- GL, codes in the range 041 - 176 and GR, codes
in the range 241 - 376. At any time GL may be invoked to be any
one of four sets G0, G1, G2 or G3 and GR to any one of G1, G2 or
G3. In turn G0 - G3 may be designated to be any one of the
possible character reportoires. Character reportoires supported
by DECmate II at present are :
* Current firmware implements ONLY Terminal Level 1, any attempt
to change to 8-bit display mode is ignored.
USACSII
LINE DRAWING (SPECIAL GRAPHICS)
DEC MULTINATIONAL SUPPLEMENTAL
These are the reportoires recommended for future use. UK is now
considered a part of DEC Multinational Supplemental.
UK
FRENCH
FRENCH-CANADIAN
DUTCH
GERMAN
These are included (together with any other Foreign Languages
that may be added) for compatibility with DECmate I and any other
software that uses the obsolete language mapping of the VTl00W.
JIS ROMAN
KATAKANA
These are extensions to the DEC 8-bit Multinational character
representation (see DEC Std. 169)
ALTERNATE ROM A
ALTERNATE ROM SPECIAL GRAPHICS
USER DEFINED (RAM)
The first two of these are again included for backwards
compatibility, the User defined RAM is a new feature whose use
and designation is TBD.
For further details on the future use of character sets and those
to be supported in future DEC products, refer to DEC Std. 169.
Following self test, G0, G1 and G3 are set to USASCII and G2 is
set to DEC Multinational Supplemental. The loadable character
generator RAM is cleared.
The G0 - G3 sets may be designated by the following ESCape
sequences :
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 18 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
ESC ( Fx 033 050 Fx Designate the G0 set
ESC ) Fx 033 051 Fx Designate the G1 set
ESC * Fx 033 052 Fx Designate the G2 set
ESC + Fx 033 053 Fx Designate the G3 set
Where Fx is a parameter defining one of the available character
reportoires as follows :
Fx Character reportoire
A (101) UK set
B (102) USASCII
I (111) JIS KATAKANA
J (112) JIS Roman Graphic
K (113) German
R (122) French
0 (060) Special graphics
1 (061) Alternate character ROM
2 (062) Alternate character ROM, special graphics
3 (063) French-Canadian
4 (064) Dutch
< (074) DEC 8-bit Multinational Supplemental
GL and GR may be invoked as G0 - G3 in either Single Shift or
Locking Shift. In Single Shift, the next graphic character
received following the receipt of the Single Shift Code will be
displayed using the newly selected character reportoire, in
Locking Shift, all graphic characters received following receipt
of the Locking Shift code will be displayed using the selected
character reportoire.
Single Shift Invokation
SS2 - ESC N (033 116) Invoke GL to G2
SS3 - ESC O (033 117) Invoke GL to G3
There are no Single Shift invokation ESCape sequences for GR, nor
for GL to G0 or G1. In 8-bit mode GL may be invoked as a single
shift to G2 or G3 on receipt of the following :-
SS2 (216) Invoke GL to G2
SS3 (217) Invoke GL to G3
Locking Shift Invokation
LS2 - ESC n (033 156) Invoke GL to G2
LS3 - ESC o (033 157) Invoke GL to G3
LS1R - ESC ~ (033 176) Invoke GR to Gl
LS2R - ESC } (033 175) Invoke GR to G2
LS3R - ESC | (033 174) Invoke GR to G3
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 19 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
There is no ESCape sequence to Invoke GL to G0 or G1, instead
this function is performed by Control Codes :
LS0 - SI (017) Invoke GL to G0
LS1 - SO (016) Invoke GL to G1
Appendix A defines the standard character patterns.
4.2.5.22 SGR - Select Graphic Rendition
ESC [ Pn ; Pn ;..... m 033 133 * 073 * 073 ... 155
Establishes the attributes to be appended to subsequent
characters according to the parameter string Pn .., as follows :
Pn Action
0 (060) All attributes OFF, normal character display
1 (061) Display at increased intensity
4 (064) Display with underline
5 (065) Display blinking
7 (067) Display as a negative (reverse) image
There are four display intensity levels for a given brightness
setting, these are 0 or no display and 1, 2, 3 - being
sequentially increasing levels of intensity. Combinations of
attributes result in displays as defined below :
Pn Character/Underscore Background
0 Level 2 Level 0
1 Level 3 Level 0
4 Level 2 * Level 0
5 Level 2/level 1 Level 0
1;4 Level 3 * Level 0
1;5 Level 3/level 2 * Level 0
4;5 Level 2/level 1 * Level 0
1;4;5 Level 3/level 2 Level 0
7 Level 0 Level 2
1;7 Level 0 Level 3
4;7 Level 0 Level 2 *
5;7 Level 0 Level 2/level 1
1;4;7 Level 0 Level 3 *
1;5;7 Level 0 Level 3/level 2 *
4;5;7 Level 0 Level 2/level 1 *
1;4;5;7 Level 0 Level 3/level 2
* these display levels alternate at the character BLINK rate.
4.2.5.23 DECWDL - Double Width Row
ESC $ 6 033 043 066
This causes the row containing the cursor to
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 20 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
become a double width character row. All
characters to the right of the centre of the
screen are lost, the display becomes either 40 or
66 columns wide. The cursor position is unchanged
unless it was previously to the right of the
screen centre, in which case it is positioned at
the new right margin.
4.2.5.24 DECDHL - Double Height Row
ESC # 3 033 043 063
This causes the row containing the cursor to
become the top half of a double height, double
width character row.
ESC # 4 033 043 064
This causes the row containing the cursor to
become the bottom half of a double height, double
width row.
These sequences must be used in pairs and the
same character data must be placed in the same
positions on each of the rows to form correct
double height characters. An attempt to display a
standalone top half or bottom half of a double
height row will result in an unpredictable
display. If the row was previously single width,
all characters to the right of the centre of the
screen are lost. The cursor position is unchanged
unless it was previously to the right of the
screen centre, in which case it is positioned at
the new right margin.
4.2.5.25 DECSWL - Single Width Row
ESC # 5 033 043 065
This causes the row containing the cursor to
become single width, single height. The cursor
position is unchanged, i.e. it remains at the
same column number.
4.2.5.26 DECSTBM - Set Top and Bottom Margins
ESC [ Pn ; Pm r 033 133 ** 073 ** 162
This sets the top and bottom screen margins to
define the scrolling region. Parameters are
expressed as decimal strings.
Pn - the number of the top row in the scrolling
region.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 21 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Pm - the number of the bottom row in the
scrolling region.
The minimum scrolling region is two rows, the top row number must
be lower than the bottom, see Origin Mode - 4.2.5.20
4.2.5.27 HTS - Horizontal Tab Set
ESC H 033 110
Set one horizontal stop at the current cursor position.
4.2.5.28 TBC - Tab Clear
ESC [ Pc g 033 133 *** 147
Clear horizontal tab stop(s), defined by parameter Pc.
Pn Action
0 (060) Clear horizontal tab at the current cursor
position, the default case with no parameter.
3 (063) Clear all horizontal tabs.
4.2.5.29 DECSC - Save Cursor (DEC Private)
ESC 7 033 067
This sequence causes the current cursor position,
graphic rendition and active character set to be
saved.
4.2.5.30 DECRC - Restore Cursor (DEC Private)
ESC 8 033 070
This sequence causes the previously saved cursor
position, graphic rendition and character set to
be restored.
4.2.5.31 DECPRS - Print Screen (DEC Private)
ESC [ i 033 133 151
This sequence is ignored.
4.2.5.32 DECLL - Load LEDS (DEC Private)
ESC [ Ps q This sequence has no effect on DECmate II.
4.2.5.33 DECALN - Screen Alignment Display (DEC Private)
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 22 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
ESC g 8 033 043 070
This sequence fills the entire screen with the
screen alignment pattern.
4.2.5.34 IL - Insert Line
ESC [ Pn L 033 133 *** 114
This sequence causes Pn (expressed as a decimal
string) lines of blanks to be inserted below the
current line. Lines below the current line are
scrolled down. This sequence has no effect if the
cursor is positioned outside the scrolling region.
4.2.5.35 DL - Delete Line
ESC [ Pn M 033 133 *** 115
This sequence causes Pn (expressed as a decimal
string) lines to be deleted below the current
line. As lines are deleted, blank lines scroll in
from the botton. This sequence has no effect if
the cursor is positioned outside the scroiing
region.
4.2.5.36 DCH - Delete Character
ESC [ Pn P 033 133 *** 120
This sequence causes P characters (expressed as
a decimal string) to te deleted, starting with
the character at the cursor position and deleting
towards the right hand margin. As characters are
deleted, characters to the right of the cursor
move to the left to fill the space created by the
deletion. See Set/Reset Mode for Character
Insertion.
4.2.6 VT52 Mode ESCAPE sequences
When the DECmate II is placed into VT52 Mode - see 4.2.5.20 for
details of this SM parameter, the following set of ESCAPE
sequences become recognised, replacing those listed in Section
4.2.5.*
4.2.6.1 Cursor Up
ESC A The cursor is move up by one row. If an attempt
is made to move the cusor above the top margin,
it is positioned at the top margin. The cursor
horizontal position does not change.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 23 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
4.2.6.2 Cursor Down
ESC B The cursor is move down by one row. If an attempt
is made to move the cursor below the bottom
margin, it is positioned at the bottom margin.
The cursor horizontal position does not change.
4.2.6.3 Cursor Right
ESC C The cursor is moved one column to the right. If
an attempt is made to move the cursor beyond the
right margin, it is positioned at the right
margin. The cursor vertical position does not
change.
4.2.6.4 Cursor Left
ESC D The cursor is moved one column to the left. If an
attempt is made to move the cursor byond the left
margin, it is positioned at the left margin. The
cursor vertical position does not change.
4.2.6.5 Enter Graphics Mode
ESC F The special graphics character set of the
standard character ROM are selected - see the
ANSI SCS sequence ESC ( 0 - Section 4.2.5.20
4.2.6.6 Exit Graphics Mode
ESC G The character set reverts to the standard USASCII
- see ANSI SCS sequence ESC ( B - Section
4.2.5.20
4.2.6.7 Cursor to Home
ESC H The cursor is positioned at HOME, the top left
corner of the screen.
4.2.6.8 Reverse Line Feed
ESC I Moves the cursor up one row without changing the
horizontal position, reverse scrolling if
necessary.
4.2.6.9 Erase to End of Screen
ESC J Erases all character positions from the current
cursor position to the end of screen inclusive.
The cursor position remains unchanged.
4.2.6.10 Erase to End of Line
ESC K Erases all character positions from the current
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 24 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
cursor position to the end of the current row.
The cursor position remains unchanged.
4.2.6.11 Direct Cursor Address
ESC Y Pr Pc The cursor is moved to the screen location given
by the two ASCII character codes following the
Direct Cursor Addressing delimiter (Y) as
follows:
the row and column parameters are formed by
adding 037 to the actual row and column numbers,
and sending that pair of ASCII characters so
formed as the next two characters following the
upper case Y, e.g. to position the cursor at
screen position 2;5 the sequence sent would be
ESC Y ! $
(041=2 044=5)
4.2.6.12 Identify
ESC Z This causes the display emulation firmware to
return the following identification sequence to
the user program :
ESC / Z
indicating that it is a VT100 type device
emulating a VT52.
4.2.6.13 Enter Alternate Keypad Mode
ESC = This causes the auxiliary keypad keys to transmit
ESCAPE sequences for Application Dependent
Purposes.
4.2.6.14 Exit Alternate Keypad Mode
ESC > This causes the auxiliary keypad to transmit the
ASCII codes for the functions or characters
engraved on the keys.
4.2.6.15 Enter ANSI Mode
ESC < This causes the display emulation firmware to go
into ANSI mode and interpret ESCAPE sequences
defined in Section 4.2.5.* (VT100 Mode).
4.3 Keyboard
The LK2XX keyboard implements the functions of keyboard scanning,
debouncing, autorepeat etc. and transmits key codes to the
DECmate II to indicate keydown conditions. Following decoding in
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 25 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Control Panel Memory, the resulting keyboard character code is
passed to the user program. Data transmission to the keyboard is
provided to allow certain keyboard parameters to be set up, e.g.
keyclick loudness. The following list of instructions is for use
by the keyboard handling code in Panel Memory and not for the
user. The characteristics of this interface are fixed with the
following parameters :
Speed 4800 baud Character 8 data bits
4.3.1 Instruction List
Instruction Description
6050 Set keyboard input flag.
6051 Skip on keyboard input flag, clear it if set.
6052 Clear the AC.
6053 NOP
6054 Inclusive OR keyboard input data with AC<4:11>,
result to AC<4:11>, AC<0:3> undefined.
6055 Set/clear keyboard input interrupt enable with
AC. AC unchanged following this instruction.
6056 Clear AC, then read keyboard input data to
AC<4:11>, AC<0:3> undefined.
6057 NOP
6110 Set keyboard output flag.
6111 Skip on keyboard output flag, clear it if set.
6112 NOP
6113 NOP
6114 AC<4:11> to the keyboard, AC unchanged.
6115 Set/clear keyboard output flag interrupt enable
with AC. AC unchanged following this
instruction.
6116 AC<4:11> to the keyboard, AC cleared.
6117 NOP
4.4 Disk Interface
The disk storage integral to the DECmate II is a single RX50
floppy disk drive with a second RX50 optional, see Section 2.3
for capacity details.
The disk may be used in either 8 or 12 bit modes. In both modes
the disk format is the same, the differences are in the
utilization of the available capacity and the format of data
transfer between the user program and the disk controller. In
8-bit mode the transfers are as 8-bit bytes to/from AC<4:ll> and
the full disk capacity is available. In 12-bit mode the transfers
are full word transfers with an effective sector size of 256
12-bit words, the disk controller still reads and writes 512 byte
sectors, reformatting the 12-bit data as it is received from the
user and creating 12-bit words prior to transferring read data to
the user. The unused bits in each sector are discarded.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 26 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Instruction Function
SEL - 6750 Select a disk pair.
If the RX02 Adaptor is not present (see section 5.4)
AC 11
0 Select RX50 drive pair A
1 Select RX50 drive pair B
If the RX02 Adaptor is present (see section 5.4)
AC 00 11
0 0/1 Select RX50 drive pair A/B
1 0 Select RX02 drive pair A/B
(See RX02 adaptor description for
details)
The first pair of RX50 drives (pair A) is
selected by CAF and following self test. The AC
is unchanged by this IOT.
LCD - 6751 Load the Command Register.
This instruction must only be issued when DONE is
true. The contents of the AC are transferred to
the disk controller to be used as a command. The
AC is cleared following this instruction.
AC(5)=0 selects 12-bit mode of operation.
AC (5)=1 selects 8-bit mode of operation.
12-bit mode is selected by CAF, RXINIT and
following self test.
AC(7)=0 selects the left drive (drive 0 - RX50).
AC(7)=1 selects the right drive (drive 1 - RX50).
AC<8:10> define the command to be executed by the
disk controller as follows :
Command AC 8 9 10
Read Sector 0 1 1
Write Sector 0 1 0
Fill Buffer 0 0 0
Empty Buffer 0 0 1
Read Status 1 0 1
Read Error Code 1 1 1
Write Sector with
Deleted Data mark 1 1 0
No Operation 1 0 0
AC have no effect.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 27 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
XDR - 6752 Transfer Data.
This IOT performs data interchange between the AC
and the disk controller, the transfer direction
is controlled by the disk controller depending on
the command being executed which controls the
data direction line OUT, and the state of the
DONE interface signal.
1. DONE false and OUT Low (data from disk)
12-bit Mode : the next word of data is
transferred from the disk controller to
AC<0:11>, the AC is cleared prior to the
transfer.
8-bit Mode : the next byte of data is
transferred from the disk controller, an
inclusive OR is performed with AC<4:11> and
the result placed in AC<4:11>. AC<0:3> are
unchanged.
2. DONE false and OUT High (transfer to disk)
12-bit Mode : AC<0:11> are transferred to the
disk controller. The AC is unchanged.
8-bit Mode : AC<4:11> are transferred to the
disk controller. The AC is unchanged.
3. DONE true
This IOT now performs a transfer to the AC
from the disk controller. 8/12-bit Mode
determines whether an 8 or 12 bit transfer
occurs.
STR - 6753 Skip on Transfer Request transition.
If the Transfer Request interface line has
changed from false to true since this IOT was
last issued, the next sequential instruction will
be skipped. If the skip does occur the transition
detector will be reset. The AC is unchanged by
this IOT.
SER - 6754 Skip on Error transition.
If the Error interface line has changed from
false to true since this IOT was last issued, the
next sequential instruction will be skipped. If
the skip does occur, the transition detector will
be reset. The AC is unchanged by this IOT.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 28 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
SDN - 6755 Skip on Done transition.
If the Done interface line has changed from false
to true since this IOT was last issued, the next
sequential instruction will be skipped. If the
skip does occur, the transition detector will be
reset. The AC is unchanged by this IOT.
INTR - 6756 Set/clear Interrupt Enable.
If AC(11)=0, the Interrupt Enable for the DONE
transition detector to cause an interrupt will be
cleared. If AC(ll)=l, it will be set. The AC is
unchanged by this IOT.
Power-on and CAF clear the Interrupt Enable.
RXINIT - 6757 Initialize.
The following are cleared :
Done transition flag
Transfer Request transition flag
Error transition flag
Done Interrupt Enable
Drive pair select is set to Unit A.
All drives are caused to initialize, the disk
controller is reset.
At the end of drive initialization, the Done
transition flag will be set to indicate
completion.
4.5 Printer
The printer interface is a standard, full duplex, serial
asynchronous port. The receive capability is provided to support
printers that use an XON-XOFF protocol to signal when they are
able/unable to accept new data from the DECmate II.
Instruction Description
6320 Set printer port input flag
6321 Skip on printer port input flag, clear it if set
6322 Clear the AC
6323 NOP
6324 Inclusive OR the printer input port data with
AC<4:11>, place the result in AC<4:11>. AC<0:3>
are unchanged.
6325 Set/clear printer port input interrupt enable
with AC(ll).
6326 Clear the AC then transfer the printer port input
data to AC<4:11>.
6327 NOP
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 29 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
6330 Set printer port output flag
6331 Skip on printer port output flag, clear it if
set.
6332 NOP
6333 Set the printer port baud rate for both input and
output as follows:
AC<8:11> Baud Rate AC<8:11> Baud Rate
0 50 10 1800
1 75 11 2000
2 110 12 2400
3 134.5 13 3600
4 150 14 4800
5 300 15 7200
6 600 16 9600
7 1200 17 19200
6334 Transfer AC<4:11> to the printer, leaving the AC
unchanged.
6335 Set/clear interrupt enable for the printer port
output with AC(11). The AC is unchanged.
6336 Transfer AC<4:11> to the printer, then clear the
AC.
6337 NOP
4.6 Communications
The communications controller provides a single, full duplex
serial port for either asynchronous or synchronous operation. In
the synchronous mode of operation either bit or byte oriented
protocols may be selected. Full modem control is provided.
4.6.1 Instruction List
Three device codes are used to control the communications port,
30, 31 and 36. 30 is associated with transferring receive data
from the communications controller chip to the AC, 31 with moving
data from the AC to the communications controller for
transmission and 36 for modem control functions.
The communications controller chip has several internal registers
which must be initialised prior to using the communications port
in a particular mode. Following self-test, the port is set to
asynchronous mode, with parameters as shown below:
Baud Rate - 1200
Data elemenets - 8
Stop bit(s) - 1
Parity - None
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 30 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Instruction Description
6360 Set Modem Change Flag. Note 1.
6361 Skip on Modem Change Flag, clear it if set.
6362 Load Modem Control Register from AC<4,7:11>
AC Bit Function Circuit # Note 2
04 Enable Terminal Timing 103/116
05 Select Internal/External Timing Note 3
07 Set Request to Send 105
08 Set Data Terminal Ready 108.2
09 SR 111
10 Enable Local Loopback 141
11 Enable Remote Loopback
6363 Set Baud Rate from AC<4:11> as shown in 4.5 in
the printer description (6333 definition)
6364 Read Modem Status to AC<7:11>
AC Bit Modem Line Circuit #. Note 2
07
08 125
09 109
10 107
11 106
6365 Set/clear Modem Change Flag Interrupt Enable with
AC. The AC is unchanged by this instruction.
6366 Access Communications Controller Internal
Register
Following power-on or after a RESET, this instruction is used
together with the Data Field to write the communicatiions chip
Control Register R0 and in so doing may specify another internal
register for access, Control Registers <0:7>, which are write
only and Status Registers <0:1> which are read only. Whichever
register is specified will be the register accessed the next time
that this instruction is issued, following access to the
specified register, access reverts to Control Register R0.
Note 1. This flag is set if any one of the following signals changes
state :
Signal Circuit #
Carrier 109
Ring 125
Data Set Ready 107
Clear to Send 106
2. Circuit numbers refer to CCITT circuits.
3. Internal timing must always be selected for asynchronous
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 31 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
operation, send and receive baud rates are controlled by the IOT
6363, as described above.
4.6.2 Internal Registers
4.6.2.1 Control Register R0
This register has three fields, used as follows :
Field A - Register Pointer.
AC<9:11> specify the register to be accessed on the next
execution of this instruction. If the register specified is a
WRITE register, AC<00> must be set to 0 for this instruction. If
the register is a READ register, AC<00> must be set to 1 for this
instruction.
Field B - Command
AC<6:8> specify one of a set of commonly used commands to be
executed :
AC<6:8> Command
000 No operation
001 Send ABORT - used when operating in SDLC mode,
causes the SDLC ABORT code to be transmitted,
destroying any data currently in the transmit
buffer. Following transmission of the ABORT, the
transmitter reverts to the IDLE phase.
010 Unused
011 Communications Port Reset. The communications
controller and Modem control lines are set to the
same initial state as following power-on.
100 Enable Interrupt on next character. When
operating in Interrupt on First Received
Character Mode, this command may be used to
re-enable the interrupt for the next received
character (generally at the end of amessage)
101 Reset Pending Transmitter Interrupt. Clears the
interrupt condition caused by the transmitter
buffer becoming empty.
110 Error Reset, used to reset an interrupt caused by
detection of a parity error or overrun error.
111 End of Interrupt, resets the communications
controller chip internal priority network to
allow for a lower priority interrupt.
Field C - CRC control commands
AC<4:5> specify the operating mode of the CRC generator/checker.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 32 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
AC<4:5> CRC Mode
0 0 No operation
0 1 Reset CRC receiver check logic
1 0 Reset CRC transmitter generator logic
1 1 Reset Idle/CRC latch, allows transmission of the
CRC field when transmitter underrun occurs,
followed by idle characters.
4.6.2.2 Control Register R1
This register is loaded from the AC as follows :
AC <4:6> 0
<7:8>
0 0 Disable Receive Data interrupts
0 1 Interrupt only on the first data character
received following this instruction
1 0 Interrupt on all data characters received and on
errors
1 1 Interrupt on received data characters
AC <9> 0
AC <10> Enable interrupts on transmit buffer empty or
when the transmitter enters the Idle phase.
AC <11> Enable interrupts on the following :
SDLC ABORT detection or termination
Idle/CRC latch ebcoming set (CRC being sent)
Entering or leaving synchronous Hunt Phase break
detection or termination
4.6.2.3 Control Register 2
This register has no relevant bits for DECmate II
operation of the communications controller chip,
if it is ever written, it must be written with
all zeroes.
4.6.2.4 Control Register 3
Loaded from AC<4:11> as follows :
AC <4:5> Select data bits per character for receive data
0 0 5 bits
0 1 7 bits
1 0 6 bits
1 1 8 bits
AC <6> 0
AC <7> Enter Sync Hunt Phase
AC <8> Enable receiver CRC. Used in character oriented
protocols to selectively exclude certain
characters from the CRC calculation. There is a
one character delay between a receive character
becoming available for reading and its being
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 33 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
presented to the CRC logic, allowing a full
character time to decide whether to exclude it or
not.
AC <9> Enable Address Search Mode. In SDLC Mode, setting
this bit inhibits character assembly until the
8-bit character (secondary address field)
following the starting flag of a message matches
either the address programmed into Control
Register R6 or the global address 11111111.
AC <10> Sync Character Load Inhibit. In synchronous mode,
setting this bit prevents sync characters from
being loaded into the receiver buffer.
AC <11> Receiver Enable, starts the receiver following
all initialization.
4.6.2.5 Control Register 4
Loaded from AC<4:11> as follows :
AC <4> 0
AC <5> 1
AC <6:7> Select operating mode for synchronous operation
0 0 8-bit internal synchronisation character
(MONOSYNC)
0 1 16-bit internal synchronisation character
(BISYNC)
1 0 SDLC
1 1 Illegal
AC <8:9> Select synchronous/asynchronous mode
0 0 Synchronous mode, see AC <6:7>
0 1 Asynchronous mode, 1 stop bit
1 0 Asynchronous mode, 1.5 stop bits
1 1 Asynchronous mode, 2 stop bits
Note: the above stop selections are for the
transmitter only, the receiver always checks for
a single stop bit.
AC <10:11> Parity select
0 0 No parity check or generate.
O 1 " " " " "
1 0 Check/generate odd parity
1 1 Check/generate even parity
4.6.2.6 Control Register 5
loaded from AC <4:11> as follows :
AC <4> 0
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 34 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
AC <5:6> Select transmit data bits/character
0 0 5 bits or less - see Table II
0 1 7 bits
1 0 6 bits
1 1 8 bits
For 5 bits per character or less, the format of
the data loaded into the transmitter determines
the actual data word length as below :
AC 4 5 6 7 8 9 10 11 Data bits/character
1 1 1 1 0 0 0 D 1
1 1 1 0 0 0 D D 2
1 1 0 0 0 D D D 3
1 0 0 0 D D D D 4
0 0 0 D D D D D 5
AC <7> Set the transmit data line to the spacing state,
used to send the BREAK condition.
AC <8> Enable the transmitter, set after all
initialization has been completed.
AC <9> Select CRC polynomial
16 12 5
0 CRC-CCITT (x + x + x + 1)
16 15 2
1 CRC-16 (X + x + x + 1)
AC <10> 0
AC <11> Enable/disable CRC generation on the transmit
data stream.
4.6.2.7 Control Register 6
loaded from AC <4:11> with SYNC byte 1, used as follows :
MONOSYNC the 8-bit SYNC character that is transmitted in
the Idle phase
BISYNC the least significant (first) 8 bits of the
16-bit receive and transmit synchronisation
field.
SDLC the secondary address value matched to the
Secondary Address Field of the SDLC frame when in
Addresss Search Mode.
4.6.2.8 Control register 7
loaded from AC <4:11> with SYNC byte 2, used as follows :
MONOSYNC 8-bit SYNC character matched by the-receiver
BISYNC the most significant (second) 8 bits of the
16-bit receive and transmit synchronisation
field.
SDLC the AC value must be set to 01111110.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 35 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
4.6.2.9 Status Register 0
The following information is loaded to AC <4:11> :
AC <4> If operating in asynchronous mode, indicates that
a BREAK has been received. If operating in
synchronous SDLC mode, that an ABORT sequence has
been received.
AC <5> Indicates the state of the Idle/CRC latch used in
synchronous modes.
AC <6) 0
AC <7> If operating in asynchronous mode - 0
If operating in synchronous mode a zero indiactes
that the receiver is in the receive data phase, a
one indicates the sync hunt phase.
AC <8> 0
AC <9> Transmit buffer empty
AC <10> Interrupt pending
AC <11> Received character avalilable
AC <0:3 > Undefined
4.6.2.10 Status Register 1
the following information is loaded into AC <4:11> :
AC <4> End of SDLC Frame; when in SDLC Mode, this
indicates that the End OF Frame flag has been
received and that the CRC error flag and residue
code are valid, This flag is reset on the first
character of the next message frame.
AC <5> In asynchronous mode, this flag is set to
indicate that a framing error has been detected
on the received data. In synchronous modes, this
bit indicates the current result of comparsion of
the computed CRC value and the appropriate check
value. It is usually set to a one.
AC <6> A receive overrun has occurred.
AC <7> Parity check is enabled and a receive parity
error has been detected.
AC <8:10> SDLC Residue Code. The data portion of an SDLC
message is terminated by an End of Frame
character. It may consist of any number of bits,
not necessarily an integral number of characters,
thus when the End of Frame condition is
indicated, these three bits indicate where the
data field terminated.
AC <11> When operating in asynchronous mode, this bit
indicates when the transmitter buffer and the
output shift register are both empty. In
synchronous mode, it is always set to a one.
AC <0:3> Undefined
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 36 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
4.6.3 Data Transfer
4.6.3.1 Input
6300 Set this device code flag
6301 Skip on any communications flag condition and
clear the flag, if set. Flag conditions are :
Transmit buffer empty
Receive character available
Errors; parity, overrun, framing
Special synchronous conditions, if enabled
6302 NOP
6303 NOP
6304 Transfer the contents of the receive buffer to AC
<4:11>
6305 Enable interrupts for this device code, using AC
<11>
6306 Transfer the contents of the receive buffer to AC
<4:11>
6307 NOP
4.6.3.2 Output
6310 Set this (dummy) flag
6311 Skip on dummy flag
6312 NOP
6313 NOP
6314 Transfer AC <4:11> to the transmit buffer
6315 Enable interrupts for this device code, using AC
<11>
6316 Transfer AC <4:11> to the transmit buffer
6317 NOP
As can be seen from the set of instructions given above, this
communications controller has a quite different method of
operation from that of the DP278. An example of how to initialize
and service this device for the asynchronous mode of operation is
given in Appendix C. For more details, refer to the DEC Purchase
Specification for the controller chip (7201).
4.7 Clock
The clock provides a periodic interrupt at a 100 Hz. rate. The
clock frequency source is crystal controlled, thus cumulative
errors should be expected. As the basic accuracy of the crystal
is 0.01%, these errors should not account to greater than +-3
seconds in an 8 hour period.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 37 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Instruction Description
6130 Set clock flag.
6131 Skip on clock flag, clear it if set.
6132 NOP
6133 NOP
6134 NOP
6135 Set/clear clock interrupt enable with AC(ll).
6136 NOP
6137 NOP
The clock interrupt enable is cleared following self test.
Note that the clock instruction set is different from that of the
DECmate I and the VT78.
5. Detailed Description - Options
5.1 Identification
The LAS instruction allows a user to determine which options are
present on DECmate II :
AC
08 0 - APU present
1 - No APU present
09 0 - RX78 or RD51 controller present*
1 - No additional storage adaptor
present
10 0 - Graphics Controller present
1 - No graphics Controller present
AC<00:07>, <11> - undefined
* Which of these is present may be tested by issuing the RD51
controller instruction 6707 with the AC set non-zero. If the RD51
controller is present, the AC will be cleared.
5.1.1 Z80 Softcard
A daughter module may be added to the basic single board computer
module to allow the execution of applications written for a Z80
microprocessor. This added module has a Z80 processor with its
own 64 K bytes of memory and an interface to the 6120 CPU system.
The 6120 performs all the actual I/0 operations for disk,
keyboard, screen, printer and communications.
A sequence (TBD) will allow operation to be switched from
executing applications programs using the PDP-8 CPU to using the
Z80 CPU, supporting CP/M(TM) file structure.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 38 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
For more details refer to the Z80 Auxiliary Processing Unit
Specification.
5.2 Graphics
Refer to the Option Engineering Specification.
5.3 Micro Winchester Disk Adaptor
Refer to the Option Engineering Specification.
5.4 RX01/RX02 Adaptor
This daughter module may be added to the base machine in place of
the Micro Winchester Adaptor to allow one or two RX01 or RX02 8"
floppy disk units to be attached to the DECmate II. An extension
to the SEL IOT allows the external 8" disk(s) to be selected in
place of the internal 5.25" disk(s) - see Section 4.4. In this
way the same IOTs may be used to control either the internal or
external disk unit(s).
The adaptor has a 37-pin subminiature D connector allowing the
same cable to be used to connect to one or two RX01/02 disk
drives as is used with DECmate I.
The selection of the external adaptor using the SEL IOT has some
limitations in the selection of the subsequently active pair of
RX01/02 drives. As the external adaptor cannot perform any
operations until after it has been selected, the SEL IOT that
changes disk selection from one of the internal units to an
external unit cannot also change which pair of external drives is
active. Drive pair "A" of the external drive controller is
selected on power-on or following a CAF/RXINIT instruction.
Subsequently issuing a SEL IOT with AC=400X will select the
external drive pair "A" regardless of AC. To select drive
pair "B", a second SEL must be issued with AC=4001. When
switching back to the internal drives, the setting of AC will
determine which of the external drive pairs will be left
"selected". This "selected" drive pair will be the pair activated
when the next SEL with AC=400X is issued.
6. Firmware Details
In general, the information given in this section, relates to how
Control Panel Code, invisible to the user, accesses the hardware
to perform some function requested by a user generated Escape
Sequence.
The section on the User Defined Character Set which is included
gives information on how a user may directly modify the contents
of the User Defined Character Generator Memory.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 39 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
6.1 CRTC and Associated Logic Programming
The CRT Controller for the VT 278 (DECmate I) occupied control
panel memory address space. As all control panel memory is used
with DECmate II, the CRT registers are now programmed by IOTs. It
is necessary to set a register number with one IOT and then read
or write this register with another IOT. Note that registers are
pre-defined as READ or WRITE, thus two IOTs are needed, one to
Read a specified register and the other to Write. Issuing a Read
IOT to a WRITE register will give unpredictable results, issuing
a Write IOT to a READ register will result in a bus contention
situation, again with unpredictable results.
It is also necessary to be able to establish the following
parameters :
80/132 column mode - Section 6.1.1
Video Enable - Section 6.1.2
Screen mode, normal or reverse - Section 6.1.3
Cursor mode, block or underline - Section 6.1.4
Erase control bits 0 and 1 - Section 6.1.5
Extended Character Set Mode - Section 6.1.6
User Character Set Mode - Section 6.1.7
IOT list - Device Code 12
6121 Skip on End of Frame Interrupt, clear the flag if set and
the skip occurs.
6122 Load the CRT Controller register number from AC<6:11>.
Load the cursor visibility enable with AC<01>, load the
cursor visibility disable with AC<00>. - Section
6123 If the DF is odd:
Load User Character RAM Character number from
AC<1:7>, Line number from AC<8:11>.
If the DF is even:
Load User Character RAM Data from AC<4:11> - Section
6124 Write selected CRT controller register from AC<4:11> -
Section
6126 Load control register
AC 00 - Erase bit 0
01 - Erase bit 1
04 - 80/132 column mode (0 = 80 column)
05 - Video Enable (0 = disable)
08 - Extended Character Set Mode
09 - User Character Set Mode
10 - Cursor mode: 0 = block
1 = underline
11 - Screen Mode: 0 = white on black
1 = black on white
6127 Read selected CRT controller register, used to clear End
of Frame Interrupt.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 40 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
6.1.1 80/132 Column Mode
This bit is changed when the DEC Private ESCape Sequence ESC [ 3
l/h is received, the SM final character (Lower Case "H") sets 132
column mode, the RM final character (Lower Case "L") sets 80
column mode. Changing column mode leaves the display in the
following condition :
Screen cleared - all memory locations in the visible region set
to contain 0000.
All display rows-set to single-width, single height.
Origin Mode cleared.
Scroll region set to 24 rows (default).
Scroll mode unchanged.
Cursor placed at the HOME position.
Cursor Mode unchanged.
Screen Mode unchanged.
Character sets for GO and G1 unchanged.
Character attributes cleared.
6.1.2 Video Enable
This bit is used to blank the display and to allow the User
Character Set RAM to be altered - see Section 6.1.7
6.1.3 Screen Mode
Changing Screen Mode (white characters on a black ground = mode
cleared, black characters on a white ground = mode set), alters
no other display parameters.
6.1.4 Cursor Mode
Changing cursor mode (block cursor = mode cleared, underline
cursor = mode set), alters no other display parameters.
6.1.5 Erase Control
To minimize CPU overhead, certain long duration screen erase
functions are executed by hardware, these are listed below :
EL0 - Erase in Line from current cursor position to end of line
EL1 - Erase in Line, entire line
ES0 - Erase in Screen from current cursor position to end of
screen
ES1 - Erase in Screen, entire screen
The particular erase function is initiated by loading a
combination of Erase Bits 0 and 1 :
ERBIT 0 ERBIT 1
EL0, ES1 * 1 0
ES0, ES1 * 1 1
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 41 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
* for these functions, the display firmware is responsible for
setting the cursor to the left margin before issuing the erase
function request and then restoring the cursor when the display
hardware indicates that the erase is complete.
Erase functions are synchronised with the display timing by the
Control Panel code waiting for an End of Frame interrupt before
initiating an erase function and then waiting for the next End of
Erame interrupt to indicate that the erase has been completed.
6.1.6 Extended Character Set Mode
DECmate I has two 2K x 8 character generator ROMs each of which
allows for the display of up to 128 characters/symbols. One has
the US/UK character set plus the special graphics set of the
VT100, the other all the characters for the Foreign Language
DECmate I variations plus some additional special graphics
symbols. These two ROMs together provide the basic DEC 8-bit
multinational character set. (See DEC Std. 138). DECmate II adds
to this the ability to display the Katakana set of the
multinational character set and a User Defined Character Set.
These additional characters/symbols are accessed using a ninth
character code bit.
To be able to display more than 256 characters, an Extended
Character Set Mode is provided for DECmate II. In this mode the
internal representation of characters in the display buffer is
nine bits, rather than the eight bits of DECmate I. The
additional bit is obtained by deleting the character attribute
"BLINK". Section 6.1.7 gives details of this mode and the User
Character Set Mode.
6.1.7 User Character Set Mode
To provide even greater flexibilty for displaying characters and
symbols that may be needed by a particular user program, a User
Defined Character Generator is provided with DECmate II. This
allows a further 128 characters, defined by the user, to be
displayed. Display is controlled by the User Character Set Mode
Enable bit, set on a page basis.
6.1.7.1 Loading the User Defined Character Generator (UDCG)
To enable writing the UDCG the Video Enable Bit must be cleared
in the display control word (AC<5>). This is done by issuing a
PR3 Panel Call with the AC zero, the UDCG may then be changed.
The entire UDCG may be altered or only specific locations, the
order of changing the UDCG does not matter. Programming is as
follows:
A. Clear the AC, issue PR3 with the following location containing
(TBD) - the function number of the Panel memory routine to
disable the display and enable changing the UDCG.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 42 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
B. Load AC<1:7> with the 7-bit character code for the character to
be altered and AC<8:11> with the first line number (000). (Line
numbers run from 0000 to 1001 : 0 - 9 decimal).
C. Set the Data Field to an odd value (1, 3, 5, 7)
Issue the IOT 6123 (this does not clear the AC)
D. Set the Data Field to an even value (0, 2, 4, 6).
Load AC<4:11> with the character dot pattern for the specified
line. The character dot pattern is entered as it will appear,
e.g. AC<4> is the leftmost dot of the character cell, see Figure
1, Section 4.2.3, note that if a character is defined with
CD<7>=1, it will be a right filled character, i.e. dot positions
8 and 9 in Figure 1. will also be present.
Issue the IOT 6123 (the AC is not cleared)
Repeat steps B, C, D for each line of the character definition.
Set the AC=7777, issue PRQ as in A. to re-enable the video.
6.1.7.2 Accessing the Extended Character Set and the User Defined
Character Set.
As noted earlier, the Extended Character Set and the User Defined
Character Set are accessed by an Extended Character Set Mode bit
(ECSM) and a User Character Set Mode Enable (UCSME) bit. The way
the user program controls these bits is not yet defined. The
combination of these bits results in access to the character
generators as shown below :
ECSM = 1 Character Code | Character Code
Bit 9 = 0 | Bit 9 = 1
------------------------------------------------
| | | | |
|UCSME = 0 | UCSME = 1 | UCSME = 0 | UCSME = 1 |
| | | | |
----------------------------------------------------------
Internal | | | | |
Char.Code| US/UK | US/UK | US/UK |User defined|
Bit 8=0 | | | with | Characters |
| | | Yen mark | |
----------------------------------------------------------
Internal | | | | |
Character| Alternate| Alternate |Katakana |User defined|
Code Bit | (Foreign)| (Foreign) | | Characters |
Bit 8=1 | | | | |
----------------------------------------------------------
|<-These are the only-->|
|possibilities when not |
| in Extended Mode |
In this way arbitrary character substitutions may be made from
the user defined character set when displaying US/UK, any Foreign
Language or Katakana.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 43 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
6.1.8 Loading and Reading the CRT Controller Registers
The CRT Controller has one group of internal registers that are
generally only changed when it is initially programmed,
parameters which affect the display format and a second group
that must be modified continually, cursor position etc.
6.1.8.1 R0 - Characters per horizontal period
This register is loaded from AC <4:11> with the number of
characters that make up one row of the display. This includes the
visible area, non-visible areas and retrace time.
6.1.8.2 R1 - Characters per data row
This register is loaded from AC <4:11> with the (number of
displayed characters per row - 1).
6.1.8.3 R2 - Horizontal delay
This register is loaded from AC <6:11> with the number of
character times which represents the time from the leading edge
of horizontal sync to the trailing edge of horizontal blank.
6.1.8.4 R3 - Horizontal sync width
This register is loaded from AC <5:11> with the number of
character times representing the width of the horizontal sync
pulse.
6.1.8.5 R4 - Vertical sync width
This register is loaded from AC <5:11> with the number of
horizontal periods representing the width of the vertical sync
pulse.
6.1.8.6 R5 - Vertical delay
This register is loaded from AC <4:11> with the number of
horizontal periods representing the time between the leading edge
of vertical sync and the trailing edge of the vertical blank
signal.
6.1.8.7 R6 - Skew bits
This register is loaded from AC <6:11> with a number of character
times that define a skew between cursor and blank and the video
signal going to the monitor.
6.1.8.8 R7 - Visible data rows per frame
This register is loaded from AC <4:11> with the (number of data
rows to be displayed - 1). For DECmate II this means 23(8) for
both 80 and 132 column modes of operation.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 44 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
6.1.8.9 R8 - Scan sines per data row/Scan lines per frame (MSB)
This register is loaded from AC <7:11> with the (number of scan
lines that make up one data row -1), for DECmate II this means
11(octal). AC <4:6> define the most significant three bits of the
number of scan lines per frame.
6.1.8.10 R9 - Scan lines per frame
This register is loaded from AC <4:11> with the least significant
8 bits that define the total number of scan lines per frame - see
R8.
6.1.8.11 ROA - DMA control register
This register is loaded from AC <4:11> with DMA control
information as follows :
AC <4> DMA disable, disables all CRT controller DMA
accesses. As the CRT controller on DECmate II is
also the source of memory refreshes, this bit
must never be set to zero unless loss of memory
data can be tolerated.
AC <5:7> Define the delay between DMA bursts when the CRT
controller is operating in burst DMA mode. For
DECmate II DMA cycles for a given row occur as a
single burst, so these three bits are set to 111.
AC <8:11> Define the number of DMA cycles in any one burst,
when the CRT controller is operating in the
burst DMA mode. The number loaded here is N,
where the number of DMA cycles in a burst is then
4*(N+1). This mode is not applicable to DECmate
II.
6.1.8.12 ROB - Control Register
This register is loaded from AC <4:11> with the following :
AC <4> Unused
AC <5> 0 - smooth scroll. This causes the smooth scroll
offset register (R17) to define the number of
lines that will be scrolled per frame. This is
the only mode used for DECmate II, thus this
bit must be set to 0.
AC <6:7> These two bits define interlace mode. DECmate II
uses no interlace. These two bits are both set to
0.
AC <8:10> These three bits define the buffer configuration
being used with the CRT controller. DECmate II
uses a single row buffer, thus these three bits
must be set to 100.
AC <11> 0
Thus the programming word for ROB is X0 001 000 010(8).
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 45 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
6.1.8.13 ROC - Table start register, low byte
6.1.9 Cursor Visibility
The DECmate I attempted to "make the cursor do the correct thing"
by suppressing the cursor whenever new data was output to the
screen at greater than a given rate. This was partially
successful in that the cursor was not visible when updating the
screen using Direct Cursor Addressing sequences, unfortunately
the cursor was also not visible when doing things like moving it
across a line when editing. DECmate II attempts to treat these
two events separately, when the firmware detects that the cursor
is being re-positioned by means of a Direct Cursor Addressing
Sequence, it will clear the cursor visibility bit when it updates
the cursor address register within the CRT controller. The effect
of this is to suppress the cursor (make it invisible) for half
the cursor blink rate period (130 milliseconds), timed from the
update, regardless of the previous state of the cursor visiblity.
Then if another Direct Cursor Address command occurs within this
period, the cursor will remain invisible.
If the cursor address register is being updated for any other
reason, the firmware will set the cursor visibility bit, this
causes the cursor to be visible for half the cursor blink rate
period (130 milliseconds), timed from the update, again
regardless of the previous state of cursor visibility. Thus, in
the cases of normal output to the screen by echoing keyboard
input and advancing through a piece of text, the cursor will
remain visible.
Setting and clearing the cursor is done by loading one of two AC
bits when a CRT controller register is selected. AC<00> = 1
clears the cursor visibility enable bit and would be selected
prior to updating the cursor as the result of a direct cursor
addressing sequence, AC<01> = 1 sets the visibility enable and
would be selected prior to updating the cursor position for any
other reason. The effect of setting either of these bits (but not
both) is that when the selected CRT register is later written,
the cursor will be set ON or OFF for the time specified above.
Care must be taken to ensure that both AC<0:1> are set to 0 when
no effect is intended on the normal alternating cursor display.
6.2 Panel Requests
There are four instructions which, when issued in user memory,
cause some action to be performed by the control memory code. To
maintain compatibility with DECmate I, the first three of these
operate in the same way as with DECmate I. The fourth is modified
and although the types of operations that may be performed using
this fourth instruction are similar there is no backwards
compatibility.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 46 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
6.2.1 PR0 - Panel Request 0
This instruction may be used to read the contents of a specified
screen location. Its use is as follows :
PR1
Row Address / Absolute, 0 - 27
Column Address / Absolute, 0 - 117 (0 - 203)
XXXX / Return made here with contents
/ of specified screen location in
/ the AC
6.2.2 PR1 - Panel Request 1
This instruction was used with DECmate I to allow the display
buffer memory to be updated quickly. It is not needed with
DECmate II as the same screen update restrictions do not apply to
this new machine, it is retained for compatibility reasons only.
To move data to the display buffer portion of memory, this
instruction is used in the following way :
PR1
Row Address / Absolute, 0 - 27
Column Address / Absolute, 0 - 117 (0 - 203)
Data / 12 bits, includes attributes
... / group of three entries
... / repeated for as many screen
... / locations as to be changed
7777 / terminator
Attributes :
AC 00 - Blink
01 - Underline
02 - Bold
03 - Reverse
6.2.3 PR2 - Panel Request 2
For DECmate I this was equivalent to entering SET-UP mode and
depressing a key, specified as :
PR2
N / The ASCII code for the key to
/ be "pressed"
This Panel Request has no action on DECmate II. If it is issued,
return will be made to CALL+2 for compatibility.
6.2.4 PR3 - Panel Request 3
This is a general call to execute a routine in control memory.
With DECmate I the absolute address in control memory had to be
specified in the location following the PR3 instruction and no
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 47 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
validity checking was performed, calls to some arbitrary address
could, therefore, cause unpredictable results. The operation of
this instruction for DECmate II has been modified, now the
routine to be executed in control memory is specified by a
function number in the location following the request. The format
is as follows :
PR3
FUNCT /Function
ARG1 /First argument (optional)
ARG2 /Second argument (optional)
..
..
7777 /Terminator
If a return is to be made, it is made to the location following
the 7777 terminator.
The following functions are implemented in the current firmware
(Revision 216 or 224)
Function Action Argument(s)
0000 Print the character None
in the accumulator.
0001 Select video enable None
with AC.
0 = disable, 1 = enable
0002 Select extended character
Mode with AC.
0 = disable, 1 = enable
0003 Select User Charaacter Set None
with AC.
0 = disable, 1 = enable
0004 Select Cursor Style with AC None
0 = Block, 1 = Underline
0005 Execute Power-on Clear None
There is no return as self-test
is run.
0006 Execute SET-UP Menu None
0007 Request Display Status None
On return, AC = 0000 means the
display is not busy, AC =7777
it is busy.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 48 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Function Action Argument(s)
0010 Select Function Key Mode with None
AC. 0 = transmit ESC/BS/LF
1 = transmit ESCape sequences
for these three keys.
0011 Select Keyboard Case with none
AC<11>. 0 = lower-case,
1 = upper-case.
4000+10*N+M Load data from user memory to
panel memory.
N - CP memory destination field
M - user memory source field
Argument 1 User memory SA
Argument 2 CP memory SA
Argument 3 2's complement of
# of words to
move
5000+10*N+M Load data from panel memory to
user memory.
N - user memory destination field
M - control panel source field
Argument 1 CP memory SA
Argument 2 User memory SA
Argument 3 2's complement of
# of words to
move
6000+10*N Transfer control to CP memory
field N.
Argument 1 CP memory SA
7000 Send data to the keyboard
Argument(s) data in bits
<4:11>. Bits
<0:3> must be
zero.
N.B. No check is made on the
data sent.
7100+10*N Transfer Screen Control Data
to a user buffer in Field N.
Argument l User Buffer SA
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 49 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
29 (decimal) words are moved to the specified
user buffer. They are :
Word 1 - Column Mode: 0 = 80, 7777 = 132
Word 2 - Origin Mode: 0 = absolute, 7777 = relative
Word 3 - The number of the top row of the current
scrolling region.
Word 4 - The number of the bottom row of the current
scrolling region.
Word 5 - The control word for the CRT Controller Chip
(See Section 6.asdasdas)
Word 6 - High Word of the Row Address Table for Row 1
Word 7 -
.... -
.... -
Word 29- High Word of the Row Address Table for Row 24.
6.3 Terminal Input Output
DECmate I had a physical register (TTI), through which keyboard
input data was transmitted from the keyboard scan routines in
Control Panel memory for the user program to be able to use
normal keyboard instrcutions, KRB, KRS KCC. DECmate II has no
such register, all keyboard data transfer instructions cause a
single Control Panel Interrupt, control panel code then inspects
the interrupting instruction and modifies the AC as required
prior to returning control to the user program.
For output, TLS and other such instructions also cause a Control
Panel interrupt in the same way as with DECmate I, the data in
the AC is taken and interpreted by Control Panel Memory code.
Instructions that cause Control Panel Interrupts are :
6030, 6032, 6034, 6036
6040, 6042, 6044, 6046
Interrupts from any of these user issued instructions are
identified by the single instruction 6071.
The Skip and Interrupt Enable instructions, (6031, 6035, 6041,
6045) do not cause Control Panel Memory interrupts.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 50 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Appendix A - Standard ROM Character Definitions
TBS
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 51 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Appendix B - CPU Instruction Set
All times are for operation at 8 MHz. (I/O at 4 MHz.)
B1. Basic Instructions
Mnemonic Octal Description Execution Time
Direct Indirect Autoindex
AND 0XXX Logical AND to AC 1.75 2.5 3.25
TAD lXXX Two's complement ADD 1.75 2.5 3.25
ISZ 2XXX Increment & Skip if 0 2.26 3.00 3.76
ISZ 2XXX (When SKIP occurs) 2.76 3.51 4.26
DCA 3XXX Deposit & clear AC 1.75 2.5 3.25
JMS 4XXX Jump to subroutine 1.75 2.5 3.25
JMP 5XXX Jump 1.00 1.75 2.47
B2. Group 1 Operate Micro-instructions
1.5 uSec if no BSW or double rotate, 1.9 uSec otherwise.(#)
*
Mnemonic Octal Description Sequence
NOP 7000 No operation -
CLA 7200 Clear AC 1
CLL 7100 Clear Link 1
CMA 7040 Complement AC 2
CML 7020 Complement Link 2
RAR 7010 Rotate AC & Link right 4
RAL 7004 Rotate AC & Link left 4
RTR# 7012 Rotate AC & Link two right 4
RTL# 7006 Rotate AC & Link two left 4
BSW# 7002 Swap AC<0:5> & AC<6:11> 4
R3L 7014 Rotate AC ONLY three left 4
IAC 7001 Increment AC, carry to Link 3
B3. Group 2 Operate Micro-instructions - 1.75 uSec.
*
Mnemonic Octal Description Sequence
SMA 7500 Skip on minus AC 1
SZA 7440 Skip on zero AC 1
SPA 7510 Skip on positive AC 1
SNA 7450 Skip on non-zero AC 1
SNL 7420 Skip on non-zero Link 1
SZL 7430 Skip on zero Link 1
SKP 7410 Unconditional Skip 1
OSR+ 7404 Inclusive OR status bits to AC 3
HLT$ 7402 Halt program in main memory 3
CLA 7600 Clear AC 2
+ Add 0.25 uSec. $ NOP in Panel Memory.
* Sequence indicates at which point in the instruction execution
the operation occurs. 1 is before 2, 2 before 3, etc.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 52 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
B4. Group 3 Operate Micro-instructions - 1.5 uSec
Mnemonic Octal Description
NOP 7401 NO operation
CLA 7601 CLear AC
MQL 7421 Load AC to MQ then clear AC
MQA 7501 Inclusive OR MQ with AC, result to AC, MQ
unchanged
CAM 7621 Clear both AC and MQ
SWP 7521 Swap AC and MQ
ACL 7701 Load MQ to AC, MQ unchanged
CLA SWP 7721 Load MQ to AC then clear MQ
B5. Internal Control Instructions ( Panel Memory )
Mnemonic Octal Description Execution Time, uSec.
PRS 6000 Read Panel Status Word* 2.01
ION 6001 Enable Interrupt System 1.5
IOF 6002 Disable Interrupt System 1.5
PGO 6003 Reset HLTFLG 1.5
PEX 6004 Exit to main Memory after next
JMP or JMS 1.5
RTF 6005 Restore fields and flags from AC 2.01
SGT 6006 Skip on GT flag 1.75
CAF 6007 Clear all flags 1.75
WSR 6246 I/O write 1.72
GCF 6256 Get current fields and flags 2.26
CPD 6266 Clear Panel Data Flag 1.5
SPD 6276 Set Panel Data Flag 1.5
B6. Internal Control Instructions ( Main Memory )
Mnemonic Octal Description Execution Time, uSec.
SKON 6000 Skip if Interrupt System ON,
turn it OFF 1.75
ION 6001 Turn ON Interrupt System 1.5
IOF 6002 Turn OFF Interrupt System 1.5
SRQ 6003 Skip on Interrupt Request 1.75
GTF 6004 Get Interrupt Flags 2.26
RTF 6005 Restore Flags and Fields from AC 2.00
SGT 6006 Skip on GT flag 1.75
CAF 6007 Clear all flags 1.75
WSR 6246 I/O write 1.72
GCF 6256 Get current fields and flags 2.26
PR0 6206 Make Panel Request 1.5
PR1 6216 Make Panel Request 1.5
PR2 6226 Make Panel Request 1.5
PR3 6236 Make Panel request 1.5
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 53 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
B7. Memory Extension Instructions
Mnemonic Octal Description Execution Time, uSec.
CDF 62N1 Change to Data Field N 1.5
CIF 62N2 Change to Instruction Field N 1.5
CDF CIF 62N3 Change both DF and IF to N 1.5
RDF 6214 Read Data Field to AC<6:8> 1.5
RIF 6224 Read Instruction Field to AC<6:8> 1.5
RIB 6234 Read Interrupt Buffer to AC<6:11> 2.25
RMF 6244 Restore Memory Fields 1.5
B8. Stack Instructions
Mnemonic Octal Description Execution Time, uSec.
PPC1 6205 Push (PC+1) to stack 1 2.25
PPC2 6245 Push (PC+1) to stack 2 2.25
PAC1 6215 Push AC to stack 1 2.25
PAC2 6255 Push AC to stack 2 2.25
RTN1 6225 Pop top of stack 1 to PC 2.25
RTN2 6265 Pop top of stack 2 to PC 2.25
POP1 6235 Pop top of stack 1 to AC 2.25
POP2 6275 Pop top of stack 2 to AC 2.25
RSP1 6207 Read stack 1 pointer to AC 1.25
RSP2 6227 Read stack 2 pointer to AC 1.25
LSP1 6217 Load stack 1 pointer from AC 1.25
LSP2 6237 Load stack 2 pointer from AC 1.25
B9. IOT instructions - External
Of the form "6XYZ" where XY is not 00 nor in the range 20 - 27.
They require 4.0 uSec for Write only, 4.5 for Write followed by
Read.
Terminal I/O Instructions
Input
Mnemonic Octal Description Execution Time, uSec.
KCF 6030 Set Keyboard Flag. * 4.0
KSF 6031 Skip on keyboard flag, clear
it if set. * 4.0
KCC 6032 Clear the AC. * 4.0
KRS 6034 "OR" keyboard buffer to AC. 4.5
KIE 6035 Set/clear Keyboard Interrupt
Enable with ACll. * 4.0
KRB 6036 Load Keyboard buffer to AC. 4.5
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 54 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Output
Mnemonic Octal Description Execution Time, uSec.
SPF 6040 Set output flag. 4.0
TSF 6041 Skip on output flag, clear
it if set. * 4.0
TCF 6042 Clear the AC. * 4.0
TIE 6045 Set/clear Output Interrupt
Enable with AC 11. * 4.0
TLS 6046 Load AC<4:11> to the screen. 4.0
* These instructions execute differently from the PDP 8/A or VT78.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 55 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Appendix C.
Communications Controller Programming
This example is in two parts, channel initialization and a
suggested way to handle interrupt service.
C1. Communications Port Initialization
Cl.l Defaults
Following the completion of Self-test, the communications port
will be left in the following state :
Mode : Asynchronous
Baud rate : 1200
Character : 8 data bits
Parity : NONE
Stop Bit(s) : 1
Modem Lines
Data Terminal Ready : ON
Request To Send : OFF
Local loopback : OFF
Remote Loopback : OFF
Clock Mode : Internal
C1.2 Setting Communications Controller Chip Parameters
The communications controller chip has two sets of internal 8-bit
registers, A and B. Mostly the registers of set A are used, but
to identify the cause of interrupt a register from the B set must
be read. The A set and B set are addressed using the same IOT,
the Data Field determines which will be accessed. With the Data
Field set to an Even number (0, 2, 4, 6), register set A will be
accessed, with the Data Field set to an ODD number, register set
B. The following shows how they must be set up for asynchronous
mode operation.
The general method of addressing a communications chip register
is to define a register number in AC<9:11> and whether it is to
be read or written, specified by AC<00>, issue the IOT 6366, then
read or write the selected register with this same IOT, i.e. this
IOT sequentially selects a register then accesses it. If the
register selected is Control Register 0, which is Write Only,
then this sequence can be shortened to a single IOT with the AC
specifying the register number (0) in AC<9:11> and also
containing the data to be written into CR0 in AC<4:8>.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 56 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
e.g. Write Control Register 4A
CDF 00 /or 20, 40, 60
TAD (4 /select CR4 for a write
6366
CLA
TAD (VAL /data to be written into CR4
6366 /Load CR4
(CLA)
CDF XX /back to user required value
Read Status register 2B
CDF 10 /or 30, 50, 70
TAD (4002 /select Status register 2 for
/READ, AC<00>=1 specifies READ
6366 /select register
CLA
6366 /Status Register 2 -> AC
AND (177 /High order bits undefined
CDF XX /back to user required value
Write Control Register OA
CDF 00
TAD (0XX0
6366 /load CR0 from AC<4:8>
(CLA)
CDF XX /user value
C1.3 Values to be used
The chip must be initialized in the following sequence any time;
that any parameter involved is modified.
C1.3.1 Issue chip reset 6367
C1.3.2 Reset Channel
CDF 00
TAD (30
6366 /Select CR0A, load with
CLA /30 = RESET
C1.3.3 Initialize CR2A
CDF 00
TAD (2 /select register CR2A
6366
CLA
TAD (20 /Fixed number
6366 /load into CR2A
CLA
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 57 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
C1.3.4 Initialize CR2B
CDF 10
TAD (2 /Select CR2B
6366
CLA
6366 /load CR2B with 000
C1.3.5 Initialize CR4A
CDF 00
TAD (4
6366 /select CR4A
CLA
TAD CR4VAL
6366
CLA ....
CR4VAL is loaded with the following:
AC <4:5> 01 (Must not be-changed)
<6:7> 00 (Must not be changed)
<8:9> Define number of STOP bits
00 - Illegal
01 - 1 STOP bit
10 - 1.5 STOP bits
11 - 2 STOP bits
<10> Parity - ignored if AC = 0
0 - ODD parity
1 - EVEN parity
<11> Parity Enable
0 - no parity generated or checked
1 - generate and check parity, sense set
by AC<10>.
e.g. 1 STOP bit, no parity, value loaded is 104
C1.3.6 Initialize CR1A
CDF 00
TAD (1
6366 /select CR1A
CLA
TAD (26 /fixed, must not change
6366
CLA ...
C1.3.7 Initialize CR2A
CDF 00
TAD (2
6366
CLA
TAD (26
CLA ....
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 58 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
C1.3.8 Initialize CR3A
CDF 00
TAD (3
6366
CLA
TAD CR3VAL
6366
CLA
CR3VAL is loaded with the following :
AC <4:5> Number of data bits for receive
00 - 5 bits
01 - 7 bits
10 - 6 bits
11 - 8 bits
AC <6:10> 00000
AC <11> 1 - Enables Receiver
e.g. 8 data bits for receive, receiver enabled, value loaded is
301.
C1.3.9 Initialize CR5A
CDF 00
TAD (5
6366
CLA
TAD CR5VAL
6366
CLA
CR5VAL is loaded with the following ;
AC <4> 0
AC <5:6> Number of data bits for transmit
00 - 5 bits (or less)
01 - 7 bits
10 - 6 bits
11 - 8 bits
AC <7> Send a BREAK
AC <8> 1 - enables transmitter
AC <9:11> 000
The chip is now ready for transmit and receive.
C1.3.10 Set Modem Status and clock mode
For the simplest case, the only Modem line to be asserted would
be DTR. In all cases for asynchonous operation, internal clock
must be selected, thus the Modem Control Register should be
loaded with the value 0010 using IOT 6362.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 59 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
C2. Interrupt Service
C2.1 Data Transfers
As there is only one flag for Send, Receive and Errors, it is
necessary to interrogate the communications controller chip to
identify the cause of a communications interrupt. There are three
possible interrupt conditions, Transmit Buffer Empty, Receive
Data Available and Error (Overrun, Framing, Parity - if enabled).
6301 /Skip on Comm. port flag
JMP NOTCOM
IDENT, CDF 10 /ODD to read Status Reg. 2B
TAD (4002
6366
CLA
6366 /Perform read
AND (7 /mask to three LS bits
the AC now contains the following :
AC 9 10 11 Condition
0 0 0 Hardware malfunction
0 0 1 Hardware malfunction
0 1 0 Hardware malfunction
0 1 1 Hardware malfunction
1 0 0 Transmitter Buffer Empty
1 0 1 Hardware malfunction
1 1 0 Receive Data Available
1 1 1 Parity, overrun or framing error
OR Hardware malfunction
To determine what caused the 111 result, one further register
must be read, Status register 1A
CDF 00
TAD (4001 /select SRlA for reading
6366
CLA
6366 /read selected register
AND (377
the AC now contains the following :
AC <0:4> Undefined
<5> Framing Error
<6> Overrun Error
<7> Parity Error
<8:11> Undefined
In addition status register 1A should be read following any
Receive Data interrupt to check for Errors.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 60 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
When the cause of the interrupt has been determined and the
appropriate action taken, Read Receiver, transmit next character
etc., the interrupt condition must be cleared. For a READ this is
done by writing to Control Register 0A with a data pattern of 70.
For a Transmit Buffer condition, the transmit done condition must
first be cleared by issuing a write to CR0A with a data pattern
of 50.
e.g. to dismiss the transmitter
CDF 00
TAD (50 /select CR0A
6366 /and write 50 to it (dismisses
/transmitter)
and common exit for any interrupt condition
CDF 00
TAD (70
6366 /select CR0A and write 70 to it
/(common End Of Interrupt Exit)
C2.2 Modem Interrupts
The second interrupt associated with the communications port is
the Modem Change Flag. This may be identified by a normal flag
test,
6361 /Skip on Modem Change Flag, clear flag
/if found set
The Modem status may then be read by the Read Modem Status IOT
6364 /Read Modem Status to AC<7:11>
AC <0:6> Undefined
<7> State of Analog Loopback
<8> State of Calling Indicator (Ring)
<9> State of Signal Detect
<10> State of Data Set Ready
<11> State of Clear to Send
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 61 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Appendix D.
Memory Allocation
Of the 64K words of memory available with DECmate II, 32KW is
allocated to the Application Program at all times - Main Memory.
The second 32KW - Control Panel Memory, is used as follows :
Fields Firmware, loaded from disk controlling the
terminal emulation, keyboard handling etc.
Fields Display Buffer
Fields Not allocated, may be used by the Applications
Program with certain limitations.
Additionally, at power-on time, Field 0 of Control Panel Memory
is overlayed by ROM with program execution starting at address
P07777. ROM or RAM may be selected as being the source of
instructions and indirect addresses or the source/destination of
operands in way similar to that in which the IF and DF fields
operate with the normal memory extension. The ROM-RAM accesses
are controlled by the WSR (6246) instruction as follows :
Instruction Fetch (Defer) Operand Access
AC<11>=0 Next cycle from ROM No change
AC=l Next cycle from RAM No change
AC<00>=0 No change ROM
AC<00>=1 No change RAM
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 62 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Appendix E.
ROM Useage.
DECmate II has, as noted in Appendix D, 4K of ROM which overlays
Field 0 of Control Panel Memory at power-on time. This ROM
performs several functions:
E1. Processor Initialization
Dynamic RAM memory is initialized.
The I/O Controller chips are initialized
The CRT Controller Chip is initialized
The Communications Controller Channel is initialized
E2. Self Test
A very basic RAM memory test is performed. The machine will loop
forever if this test fails.
A simple loader is then moved from ROM to RAM, Control Panel
Field P0 and executed to move the remainder of ROM to RAM,
Control Panel Field P7.
Execution of the loaded code begins at RAM address P70200 in
Control Panel Memory.
Fields P2 and P3 of Control Panel Memory are cleared.
The CRT Controller chip is checked to ensure that it is causing
interrupts.
Fields of Main Memory and Fields of Control Panel
Memory are then tested.
Code is moved to Main Memory to allow the normal interrupt system
to be checked for the Real Time Clock and Printer Port. Checks
are also made to ensure that the HLT instruction, Panel Requests
and Keyboard instructions cause Control Panel Interrupts.
The Keyboard serial data path is then checked in local loopback
mode.
If there is an RD51 present on the system, a delay of 15 seconds
is initiated to allow time for the RD51 motor current demand on
the power supply to drop to its normal operating level. When this
delay is over, or if it is determined that there is no RD51
present, the RX50 controller is allowed to start by issuing an
initial LCD IOT. Data transfer to/from the RX50 controller buffer
is then checked.
Any errors detected during the self-test result in the display of
an error number at the completion of the test.
E3. Bootstrap Procedure
At the end of self-test,a further check is made for the presence
of the RD51 disk.
. RD51 Present:
If the controller is found to be present, a further 10 second
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 63 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
delay is initiated to allow the disk to come fully up to speed.
During this 10 second period, the RD Ready bit is tested. If the
bit does not come true before the 10 second period is over, the
timer is reset and the flag test made again. Once the flag is
found to be set, the disk error flag is checked. If there is an
error condition indicated by the RD51 controller, bootstrapping
continues using the RX50. If no error is indicated, the RD51
Startup Block is read into Control Panel Memory Field P7. At the
completion of the read, the block is checked for validity. The
first 6 bytes must be as follows :
001 /Start of identifier sequence
122 /R
104 /D
065 /5
061 /1
002 /End of identifier sequence
If the Startup Block verifies good, it is then executed. Refer to
the appropriate RD51 controller specification(s) for details of
the Startup Block format. If the block is invalid (by this
check), bootstrapping continues from the RX50.
. RD51 Not present:
A Read Status command is issued to the RX50 controller and a 4
second timer established. If the RX50 controller does not set the
Done flag within this period, the sequence is repeated. When the
Done flag is finally found, the drive status is read. If Unit 0
(Drive A) is not ready, the DECMATE II logo is displayed as a
double height , double width image, centred on the screen. If the
drive is ready or when it does become ready (when a diskette is
inserted in drive 0), the screen is cleared and Track 1 Sector 0,
the Bootstrap Block for all operating systems, is read into
memory in 8-bit mode. If a disk error is indicated during this
read operation, a picture of a diskette is displayed as an
indication to try another system disk. If no error is indicated
by the disk controller, the data read is then checked for
validity. A valid Boot block must conform to the Boot Block
Standard (See Appendix G). If the validity check fails, the
diskette picture is displayed and the read operation repeated. If
the Boot Block passes this check it is assumed good.
The next area of the diskette to be validated is the Main
Keyboard Translation Table. This is stored in sector 3 of Track
0. This area of the diskette is read in, in 8-bit mode, to
Control Panel Memory, starting at address 15350. (The actual
keyboard translation table data begins at 15360, the first eight
characters read which are used for validation are read into a
buffer area). If a disk controller error is indicated during this
read operation, the diskette picture is displayed and the read
repeated. If no controller error is indicated, the data read can
then be validated. The first bytes read must be :
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 64 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
001 /Start of identifier sequence
113 /K
102 /B
104 /D
102 /B
122 /R
104 /D
002 /End of identifier sequence
If the data does not pass this check, it is assumed that the
keyboard translation table is invalid, the diskette picture is
displayed and the read operation repeated. If the validity check
is passed, system initialization continues with reading the User
Character Generator RAM data from the diskette, Track 0, Sectors
7 - 10, into memory. If no controller error is indicated, the
data read in is validated in the same way as the Keyboard
Translation Table. In this case the first words of data read must
be :
001 /Start of identifier sequence
125 /U
103 /C
107 /G
122 /R
101 /A
115 /M
002 /End of identifier sequence
If the validity check fails, or if there was a disk controller
error indicated after the read operation, the User Character
Generator RAM is loaded with zero (all blank characters). If the
validity check is passed, the data read from the diskette is
loaded into the UCG RAM.
This completes the loading of language specific data from the
diskette, the actual firmware is now loaded. All Track 78 is now
read in 12-bit mode into Control Panel Memory, starting at
address P00000. If a controller error is indicated at the
completion of the read, the diskette picture is displayed and the
entire diskette readin operation restarted. If no controller
error is indicated, the remainder of Control Panel Memory Field
P0 is loaded from Track 79, Sectors 1 - 6, with the same check
made for controller error as with Track 78. Following this, the
remainder of Track 79 is read into Control Panel Memory Field P1,
starting at address P10000 with the same error check made. When
all the firmware has been read in, it is checked for validity,
memory locations P00001 - P00003 must be :
P00001/6201
P00002/0033
P00003/0077
(memory location P00000 contains the current firmware revision)
If the validity check fails, the entire diskette read-in
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 65 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
operation is restarted. If the check is good, execution of
firmware begins at Address P00200 in Control Panel Memory.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 66 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
E4. SETUP
Code in ROM supports the "SETUP" feature of the DECmate II to
allow certain screen features such as column mode (80/132),
cursor style etc. to be changed by a user and optionally stored
in the firmware area of the system diskette to be used as new
defaults. SETUP is invoked by a user program issuing a Panel
Request to the firmware which in turn loads a section of the ROM
into Control Panel Memory Field P7 and then transfers control to
the loaded code at address P00177, by means of a subroutine call
to address P000176 with the AC = 0000. (See HLT processing)
The ROM code then reads Track 0, Sectors 1 and 2 in 8-bit mode.
These two sectors contain the text file that results in the SETUP
Menu being displayed. The text file is validated after being
read. If there is an error on reading in these two sectors or if
the validation check fails, return is made immediately to the
firmware and hence to the user program. The first bytes of the
text file must be:
001 /Start of identifier sequence
123 /S
105 /E
124 /T
125 /U
120 /P
002 /End of identifier sequence
The remainder of the file can contain any text with a page of
text starting with a control code 002 (^B), using any 8-bit
character codes, but must refer in sequence to the selectable
parameters as listed below. The end of a text field and start of
a parameter field is defined by the control code 036 (^^),
sub-fields within a parameter field are separated by the control
code 037 (^_). The end of the entire screen of text is defined by
the control code 003 (^C). Subsequent pages are prefixed with
another control code 002 (^B). See the example of the English
Language SETUP file below, in particular refer to the operating
instructions given below the row of "====".
In this example, the following representations of control
characters are used:
. Space
^A 001
^B 002
^C 003
^^ 036
^_ 037
All other codes are actual displayed characters.
The second "page" of text "Are you sure etc..." is displayed in
response to the user pressing the "Do" key to save the new
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 67 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Selections on the firmware area of the system diskette. It
replaces the text displayed below the row of "====". The third
"page" of text is displayed in response to the user pressing the
"Re-move" key to mount a new system diskette. It replaces the
entire page.
English Language SETUP Text File Version 1.
^ASETUP^B......USER.SELECTIONS.MENU
Screen.Width..........^^80......^_132
Cursor.Style..........^^Block...^_Underline
Cursor.Visibility.....^^Visible.^_Invisible
Scrolling.............^^Fast....^_Slow
Screen.Mode...........^^Normal..^_Reverse
Keyboard.keyclick.....^^ON......^_OFF
Terminal.Mode.........^^VT100...^_VT52
Baud.rates
.....Printer..........^^300^_600^_1200^_2400^_4800^_9600
.....Communications...^^300^_600^_1200^_2400^_4800^_9600
=======================================================================
....Press.:
...........'->'.to.Advance '<-'.to.Backup,.'Select'.to.fix.new.selection
...........'Do'.to.fix.new.selections.and.leave.Selections.Menu
...........'Return'.to.use.new.selections.and.leave.Selections.Menu
...........'Remove'.to.load.new.System.Disk
^C^BAre.you.sure.?..Press.'Do'.to.confirm
^C^BInsert.new.System.Disk.and.press.'Do'
Any.other.key.will.return.to.User.Selections.Menu
^C
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 68 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Appendix F.
RX50 Disk Format/Useage.
There are three tracks on a DECmate II floppy diskette that are
reserved and may not be used by any operating system, tracks 0,
78 and 79.
Track 0 :
Sectors 1 and 2 contain the text file that supports the SETUP
handler part of ROM. These sectors are written (and read) in
8-bit mode.
Sector 3 contains the main keyboard translation table, (the main
keyboard comprises all keys of the main array, but excludes the
cursor pad, the application pad and the function keys). This
sector is written (and read in) in 8-bit mode and consists of
four bytes per key location on the main key array, defining what
each key shall generate in the four possible modes :
Normal, Shifted, Caps (or Shift) Lock and Control.
The value stored in each location of the table is the actual
8-bit value to be generated for that combination of key and
modifier. For any key and modifier that generates no code, that
table entry is set to contain a zero.
Example : Key address 194 is the key labelled "A", the four
entries for this key address are :
Normal Shift Caps Lock Control
141 101 101 001
(a) (A) (A) (Control code SOH)
The key sequence is as follows :
Key Address Key definition for USASCII - WPS
188 DELETE
189 RETURN
190 TAB
191 GRAVE ACCENT- TILDE
192 1 !
193 Q
194 A
195 Z
196 NO KEY AT THIS POSITION
197 2 @
198 W
199 S
200 X
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 69 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
201 < >
202 NO KEY AT THIS POSITION
203 3 #
204 E
205 D
206 C
207 NO KEY AT THIS POSITION
208 4 $
209 R
210 F
211 V
212 "SPACE"
213 "SPACE"
214 5 %
215 T
216 G
217 B
218 NO KEY AT THIS POSITION
219 6 ^
220 Y
221 H
222 N
223 NO KEY AT THIS POSITION
224 7 &
225 U
226 J
227 M
228 NO KEY AT THIS POSITION
229 8 *
230 I
231 K
232 , ,
233 NO KEY AT THIS POSITION
234 9 (
235 O
236 L
237 . .
238 NO KEY AT THIS POSITION
239 0 )
240 P
241 NO KEY AT THIS POSITION
242 ; :
243 / ?
244 NO KEY AT THIS POSITION
245 = +
246 ] }
247 \ |
248 NO KEY AT THIS POSITION
249 - _
250 [ {
251 ' "
252 NO KEY AT TH IS POSITION
253 NO KEY AT THIS POSITION
254 NO KEY AT THIS POSITION
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 70 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
255 NO KEY AT THIS POSITION
For keys required to generate a NULL (000) code, the appropriate
table location is setup to contain 377. (For the USASCII- WPS
keyboard, there are three entries of this kind, the two "SPACE"
key addresses and the "2" key address, all three generate NULL
for the CNTRL condition). The ROM loading program then performs a
further translation on this code to load a 4000 value into the
actual keyboard translation table.
Refer to LK201 Keyboard Specification for Foreign Language
Variations.
Sector 4 contains the text file that supports the HLT instruction
part of the ROM code. This file is specified in a similar way to
the SETUP text file. When a HLT instruction is executed in user
memory, the HLT processor present in panel memory moves the
contents of ROM into control panel memory Field 7, starting at
location 70100 and then transfers control to the loaded code by
executing a JMS to location 70176. The HLT processing code then
reads Track 0 Sector 4 and performs a validity check on the text
data. The first eight words read must be :
001 /Header
110 /H
114 /L
124 /T
106 /F
114 /L
107 /G
002 /Terminator
If an error is made on reading the sector or if the validity
check fails, return is made immediately to the firmware, which
will in turn return to the user program at the location following
the HLT instruction. If there is no read error and the validity
check is passed, the CRT controller Row Address Table is reset so
that the current screen data may be preserved for the possible
return from the HLT processing and the text file displayed. This
is formatted in the same way as the SETUP text file but allows
only the options of "Do" to continue from the HLT and "SETUP" to
enter SETUP. If the "Do" option is selected, the CRT Controller
RAT is reset to restore the original screen data.
Sectors 5 and 6 are currently unused.
Sectors 7 - 10 contain the data to be loaded into the User
Defined character Generator RAM. This data is read in as a part
of the Bootstrap process. If a disk read error occurs or the disk
data fails a validity check, the User Charatcer RAM is filled
with nulls. If there is no read error and the validity check is
passed, the data read is loaded into the RAM. The data consists
of 16 bytes per character, one byte for each possible RAM
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 71 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DECmate II Specification
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
location allocated for a character. As only 10 lines are actually
used to display a character, only the first 10 bytes of each 16
have significance, the last 6 of a group of 16 should be zero.
The validation check for this data is :
001 /Header
125 /U
103 /C
107 /G
122 /R
101 /A
115 /M
002 /Terminator
Appendix G.
The section of the RX50 Bootstrap Block Standard that applies to
DECmate II requires that The Boot Block (Track 1, Sector 1)
contain the following at its beginning :
Byte # Contents
0 0
1 0
2 N - an offset to additional ID
information
3 1 - System Disk (A non-system disk would
contain 0 here)
4 0
5 0
Additional ID words begin here
2*N+2 010 - PDP 8 Code on this diskette
2*N+3 010 - RX278 Controller
2*N+4 010 - WPS8 Diskette Structure
011 - OS8 Diskette Structure
012 - COS310 Diskette Structure
100 - CP/M Diskette Structure
2*N+5 347 - WPS8 )
346 - OS8 ) computed check value
345 - COS310) for above data
257 - CP/M )
2*N+6 0 - always
2*N+7 1 - Revision of this standard + single
sided diskette
For greater detail refer to the actual standard.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
16-January-1983
Page 72 Rev 4
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -